LLVM  8.0.1
SystemZSubtarget.h
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1 //===-- SystemZSubtarget.h - SystemZ subtarget information -----*- C++ -*--===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file declares the SystemZ specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZSUBTARGET_H
15 #define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZSUBTARGET_H
16 
17 #include "SystemZFrameLowering.h"
18 #include "SystemZISelLowering.h"
19 #include "SystemZInstrInfo.h"
20 #include "SystemZRegisterInfo.h"
22 #include "llvm/ADT/Triple.h"
24 #include "llvm/IR/DataLayout.h"
25 #include <string>
26 
27 #define GET_SUBTARGETINFO_HEADER
28 #include "SystemZGenSubtargetInfo.inc"
29 
30 namespace llvm {
31 class GlobalValue;
32 class StringRef;
33 
35  virtual void anchor();
36 protected:
54  bool HasVector;
66 
67 private:
68  Triple TargetTriple;
69  SystemZInstrInfo InstrInfo;
70  SystemZTargetLowering TLInfo;
72  SystemZFrameLowering FrameLowering;
73 
74  SystemZSubtarget &initializeSubtargetDependencies(StringRef CPU,
75  StringRef FS);
76 public:
77  SystemZSubtarget(const Triple &TT, const std::string &CPU,
78  const std::string &FS, const TargetMachine &TM);
79 
80  const TargetFrameLowering *getFrameLowering() const override {
81  return &FrameLowering;
82  }
83  const SystemZInstrInfo *getInstrInfo() const override { return &InstrInfo; }
84  const SystemZRegisterInfo *getRegisterInfo() const override {
85  return &InstrInfo.getRegisterInfo();
86  }
87  const SystemZTargetLowering *getTargetLowering() const override {
88  return &TLInfo;
89  }
90  const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
91  return &TSInfo;
92  }
93 
94  // True if the subtarget should run MachineScheduler after aggressive
95  // coalescing. This currently replaces the SelectionDAG scheduler with the
96  // "source" order scheduler.
97  bool enableMachineScheduler() const override { return true; }
98 
99  // This is important for reducing register pressure in vector code.
100  bool useAA() const override { return true; }
101 
102  // Always enable the early if-conversion pass.
103  bool enableEarlyIfConversion() const override { return true; }
104 
105  // Enable tracking of subregister liveness in register allocator.
106  bool enableSubRegLiveness() const override;
107 
108  // Automatically generated by tblgen.
110 
111  // Return true if the target has the distinct-operands facility.
112  bool hasDistinctOps() const { return HasDistinctOps; }
113 
114  // Return true if the target has the load/store-on-condition facility.
115  bool hasLoadStoreOnCond() const { return HasLoadStoreOnCond; }
116 
117  // Return true if the target has the load/store-on-condition facility 2.
118  bool hasLoadStoreOnCond2() const { return HasLoadStoreOnCond2; }
119 
120  // Return true if the target has the high-word facility.
121  bool hasHighWord() const { return HasHighWord; }
122 
123  // Return true if the target has the floating-point extension facility.
124  bool hasFPExtension() const { return HasFPExtension; }
125 
126  // Return true if the target has the population-count facility.
127  bool hasPopulationCount() const { return HasPopulationCount; }
128 
129  // Return true if the target has the message-security-assist
130  // extension facility 3.
132 
133  // Return true if the target has the message-security-assist
134  // extension facility 4.
136 
137  // Return true if the target has the reset-reference-bits-multiple facility.
140  }
141 
142  // Return true if the target has the fast-serialization facility.
144 
145  // Return true if the target has interlocked-access facility 1.
147 
148  // Return true if the target has the miscellaneous-extensions facility.
151  }
152 
153  // Return true if the target has the execution-hint facility.
154  bool hasExecutionHint() const { return HasExecutionHint; }
155 
156  // Return true if the target has the load-and-trap facility.
157  bool hasLoadAndTrap() const { return HasLoadAndTrap; }
158 
159  // Return true if the target has the transactional-execution facility.
161 
162  // Return true if the target has the processor-assist facility.
163  bool hasProcessorAssist() const { return HasProcessorAssist; }
164 
165  // Return true if the target has the DFP zoned-conversion facility.
167 
168  // Return true if the target has the enhanced-DAT facility 2.
169  bool hasEnhancedDAT2() const { return HasEnhancedDAT2; }
170 
171  // Return true if the target has the load-and-zero-rightmost-byte facility.
174  }
175 
176  // Return true if the target has the message-security-assist
177  // extension facility 5.
179 
180  // Return true if the target has the DFP packed-conversion facility.
182 
183  // Return true if the target has the vector facility.
184  bool hasVector() const { return HasVector; }
185 
186  // Return true if the target has the miscellaneous-extensions facility 2.
189  }
190 
191  // Return true if the target has the guarded-storage facility.
192  bool hasGuardedStorage() const { return HasGuardedStorage; }
193 
194  // Return true if the target has the message-security-assist
195  // extension facility 7.
197 
198  // Return true if the target has the message-security-assist
199  // extension facility 8.
201 
202  // Return true if the target has the vector-enhancements facility 1.
204 
205  // Return true if the target has the vector-packed-decimal facility.
207 
208  // Return true if the target has the insert-reference-bits-multiple facility.
211  }
212 
213  // Return true if GV can be accessed using LARL for reloc model RM
214  // and code model CM.
215  bool isPC32DBLSymbol(const GlobalValue *GV, CodeModel::Model CM) const;
216 
217  bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
218 };
219 } // end namespace llvm
220 
221 #endif
const SystemZRegisterInfo & getRegisterInfo() const
This class represents lattice values for constants.
Definition: AllocatorList.h:24
bool hasResetReferenceBitsMultiple() const
bool isOSBinFormatELF() const
Tests whether the OS uses the ELF binary format.
Definition: Triple.h:604
bool hasFastSerialization() const
bool hasLoadStoreOnCond() const
void ParseSubtargetFeatures(StringRef CPU, StringRef FS)
const SelectionDAGTargetInfo * getSelectionDAGInfo() const override
bool useAA() const override
bool hasGuardedStorage() const
bool hasMiscellaneousExtensions2() const
bool hasMiscellaneousExtensions() const
bool hasInterlockedAccess1() const
bool enableMachineScheduler() const override
bool isPC32DBLSymbol(const GlobalValue *GV, CodeModel::Model CM) const
bool enableSubRegLiveness() const override
bool hasMessageSecurityAssist7() const
bool enableEarlyIfConversion() const override
bool hasDFPPackedConversion() const
Targets can subclass this to parameterize the SelectionDAG lowering and instruction selection process...
bool hasVectorEnhancements1() const
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
const SystemZInstrInfo * getInstrInfo() const override
bool hasVectorPackedDecimal() const
const SystemZTargetLowering * getTargetLowering() const override
const TargetFrameLowering * getFrameLowering() const override
Information about stack frame layout on the target.
bool hasMessageSecurityAssist4() const
bool hasDFPZonedConversion() const
bool hasMessageSecurityAssist8() const
bool hasProcessorAssist() const
bool hasTransactionalExecution() const
bool hasInsertReferenceBitsMultiple() const
bool hasMessageSecurityAssist3() const
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:59
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
bool hasLoadAndZeroRightmostByte() const
bool hasMessageSecurityAssist5() const
bool hasLoadStoreOnCond2() const
bool hasPopulationCount() const
const SystemZRegisterInfo * getRegisterInfo() const override
SystemZSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM)