LLVM  8.0.1
Sparc.h
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1 //===-- Sparc.h - Top-level interface for Sparc representation --*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the entry points for global functions defined in the LLVM
11 // Sparc back-end.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_SPARC_SPARC_H
16 #define LLVM_LIB_TARGET_SPARC_SPARC_H
17 
21 
22 namespace llvm {
23  class FunctionPass;
24  class SparcTargetMachine;
25  class formatted_raw_ostream;
26  class AsmPrinter;
27  class MCInst;
28  class MachineInstr;
29 
30  FunctionPass *createSparcISelDag(SparcTargetMachine &TM);
31  FunctionPass *createSparcDelaySlotFillerPass();
32 
33  void LowerSparcMachineInstrToMCInst(const MachineInstr *MI,
34  MCInst &OutMI,
35  AsmPrinter &AP);
36 } // end namespace llvm;
37 
38 namespace llvm {
39  // Enums corresponding to Sparc condition codes, both icc's and fcc's. These
40  // values must be kept in sync with the ones in the .td file.
41  namespace SPCC {
42  enum CondCodes {
43  ICC_A = 8 , // Always
44  ICC_N = 0 , // Never
45  ICC_NE = 9 , // Not Equal
46  ICC_E = 1 , // Equal
47  ICC_G = 10 , // Greater
48  ICC_LE = 2 , // Less or Equal
49  ICC_GE = 11 , // Greater or Equal
50  ICC_L = 3 , // Less
51  ICC_GU = 12 , // Greater Unsigned
52  ICC_LEU = 4 , // Less or Equal Unsigned
53  ICC_CC = 13 , // Carry Clear/Great or Equal Unsigned
54  ICC_CS = 5 , // Carry Set/Less Unsigned
55  ICC_POS = 14 , // Positive
56  ICC_NEG = 6 , // Negative
57  ICC_VC = 15 , // Overflow Clear
58  ICC_VS = 7 , // Overflow Set
59 
60  FCC_A = 8+16, // Always
61  FCC_N = 0+16, // Never
62  FCC_U = 7+16, // Unordered
63  FCC_G = 6+16, // Greater
64  FCC_UG = 5+16, // Unordered or Greater
65  FCC_L = 4+16, // Less
66  FCC_UL = 3+16, // Unordered or Less
67  FCC_LG = 2+16, // Less or Greater
68  FCC_NE = 1+16, // Not Equal
69  FCC_E = 9+16, // Equal
70  FCC_UE = 10+16, // Unordered or Equal
71  FCC_GE = 11+16, // Greater or Equal
72  FCC_UGE = 12+16, // Unordered or Greater or Equal
73  FCC_LE = 13+16, // Less or Equal
74  FCC_ULE = 14+16, // Unordered or Less or Equal
75  FCC_O = 15+16, // Ordered
76 
77  CPCC_A = 8+32, // Always
78  CPCC_N = 0+32, // Never
79  CPCC_3 = 7+32,
80  CPCC_2 = 6+32,
81  CPCC_23 = 5+32,
82  CPCC_1 = 4+32,
83  CPCC_13 = 3+32,
84  CPCC_12 = 2+32,
85  CPCC_123 = 1+32,
86  CPCC_0 = 9+32,
87  CPCC_03 = 10+32,
88  CPCC_02 = 11+32,
89  CPCC_023 = 12+32,
90  CPCC_01 = 13+32,
91  CPCC_013 = 14+32,
92  CPCC_012 = 15+32
93  };
94  }
95 
96  inline static const char *SPARCCondCodeToString(SPCC::CondCodes CC) {
97  switch (CC) {
98  case SPCC::ICC_A: return "a";
99  case SPCC::ICC_N: return "n";
100  case SPCC::ICC_NE: return "ne";
101  case SPCC::ICC_E: return "e";
102  case SPCC::ICC_G: return "g";
103  case SPCC::ICC_LE: return "le";
104  case SPCC::ICC_GE: return "ge";
105  case SPCC::ICC_L: return "l";
106  case SPCC::ICC_GU: return "gu";
107  case SPCC::ICC_LEU: return "leu";
108  case SPCC::ICC_CC: return "cc";
109  case SPCC::ICC_CS: return "cs";
110  case SPCC::ICC_POS: return "pos";
111  case SPCC::ICC_NEG: return "neg";
112  case SPCC::ICC_VC: return "vc";
113  case SPCC::ICC_VS: return "vs";
114  case SPCC::FCC_A: return "a";
115  case SPCC::FCC_N: return "n";
116  case SPCC::FCC_U: return "u";
117  case SPCC::FCC_G: return "g";
118  case SPCC::FCC_UG: return "ug";
119  case SPCC::FCC_L: return "l";
120  case SPCC::FCC_UL: return "ul";
121  case SPCC::FCC_LG: return "lg";
122  case SPCC::FCC_NE: return "ne";
123  case SPCC::FCC_E: return "e";
124  case SPCC::FCC_UE: return "ue";
125  case SPCC::FCC_GE: return "ge";
126  case SPCC::FCC_UGE: return "uge";
127  case SPCC::FCC_LE: return "le";
128  case SPCC::FCC_ULE: return "ule";
129  case SPCC::FCC_O: return "o";
130  case SPCC::CPCC_A: return "a";
131  case SPCC::CPCC_N: return "n";
132  case SPCC::CPCC_3: return "3";
133  case SPCC::CPCC_2: return "2";
134  case SPCC::CPCC_23: return "23";
135  case SPCC::CPCC_1: return "1";
136  case SPCC::CPCC_13: return "13";
137  case SPCC::CPCC_12: return "12";
138  case SPCC::CPCC_123: return "123";
139  case SPCC::CPCC_0: return "0";
140  case SPCC::CPCC_03: return "03";
141  case SPCC::CPCC_02: return "02";
142  case SPCC::CPCC_023: return "023";
143  case SPCC::CPCC_01: return "01";
144  case SPCC::CPCC_013: return "013";
145  case SPCC::CPCC_012: return "012";
146  }
147  llvm_unreachable("Invalid cond code");
148  }
149 
150  inline static unsigned HI22(int64_t imm) {
151  return (unsigned)((imm >> 10) & ((1 << 22)-1));
152  }
153 
154  inline static unsigned LO10(int64_t imm) {
155  return (unsigned)(imm & 0x3FF);
156  }
157 
158  inline static unsigned HIX22(int64_t imm) {
159  return HI22(~imm);
160  }
161 
162  inline static unsigned LOX10(int64_t imm) {
163  return ~LO10(~imm);
164  }
165 
166 } // end namespace llvm
167 #endif
This class represents lattice values for constants.
Definition: AllocatorList.h:24
FunctionPass * createSparcDelaySlotFillerPass()
createSparcDelaySlotFillerPass - Returns a pass that fills in delay slots in Sparc MachineFunctions ...
static unsigned LO10(int64_t imm)
Definition: Sparc.h:154
static const char * SPARCCondCodeToString(SPCC::CondCodes CC)
Definition: Sparc.h:96
static unsigned HIX22(int64_t imm)
Definition: Sparc.h:158
static unsigned HI22(int64_t imm)
Definition: Sparc.h:150
static unsigned LOX10(int64_t imm)
Definition: Sparc.h:162
FunctionPass * createSparcISelDag(SparcTargetMachine &TM)
createSparcISelDag - This pass converts a legalized DAG into a SPARC-specific DAG, ready for instruction scheduling.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
CondCodes
Definition: Sparc.h:42
void LowerSparcMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, AsmPrinter &AP)
IRTranslator LLVM IR MI