llvm::MipsMCCodeEmitter Class Reference

#include "Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h"

Inheritance diagram for llvm::MipsMCCodeEmitter:

Collaboration diagram for llvm::MipsMCCodeEmitter:

Public Member Functions
	MipsMCCodeEmitter (const MCInstrInfo &mcii, MCContext &Ctx_, bool IsLittle)
	MipsMCCodeEmitter (const MipsMCCodeEmitter &)=delete
MipsMCCodeEmitter &	operator= (const MipsMCCodeEmitter &)=delete
	~MipsMCCodeEmitter () override=default
void	EmitByte (unsigned char C, raw_ostream &OS) const
void	EmitInstruction (uint64_t Val, unsigned Size, const MCSubtargetInfo &STI, raw_ostream &OS) const
void	encodeInstruction (const MCInst &MI, raw_ostream &OS, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const override
	encodeInstruction - Emit the instruction. More...
uint64_t	getBinaryCodeForInstr (const MCInst &MI, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getJumpTargetOpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getJumpTargetOpValue - Return binary encoding of the jump target operand. More...
unsigned	getJumpTargetOpValueMM (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getUImm5Lsl2Encoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getSImm3Lsa2Value (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getUImm6Lsl2Encoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getSImm9AddiuspValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getBranchTargetOpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTargetOpValue - Return binary encoding of the branch target operand. More...
unsigned	getBranchTargetOpValue1SImm16 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTargetOpValue1SImm16 - Return binary encoding of the branch target operand. More...
unsigned	getBranchTargetOpValueMMR6 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTargetOpValueMMR6 - Return binary encoding of the branch target operand. More...
unsigned	getBranchTargetOpValueLsl2MMR6 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTargetOpValueLsl2MMR6 - Return binary encoding of the branch target operand. More...
unsigned	getBranchTarget7OpValueMM (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTarget7OpValueMM - Return binary encoding of the microMIPS branch target operand. More...
unsigned	getBranchTargetOpValueMMPC10 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTargetOpValueMMPC10 - Return binary encoding of the microMIPS 10-bit branch target operand. More...
unsigned	getBranchTargetOpValueMM (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTargetOpValue - Return binary encoding of the microMIPS branch target operand. More...
unsigned	getBranchTarget21OpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTarget21OpValue - Return binary encoding of the branch target operand. More...
unsigned	getBranchTarget21OpValueMM (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTarget21OpValueMM - Return binary encoding of the branch target operand for microMIPS. More...
unsigned	getBranchTarget26OpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTarget26OpValue - Return binary encoding of the branch target operand. More...
unsigned	getBranchTarget26OpValueMM (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getBranchTarget26OpValueMM - Return binary encoding of the branch target operand. More...
unsigned	getJumpOffset16OpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getJumpOffset16OpValue - Return binary encoding of the jump target operand. More...
unsigned	getMachineOpValue (const MCInst &MI, const MCOperand &MO, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	getMachineOpValue - Return binary encoding of operand. More...
unsigned	getMSAMemEncoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
template<unsigned ShiftAmount = 0>
unsigned	getMemEncoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	Return binary encoding of memory related operand. More...
unsigned	getMemEncodingMMImm4 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMemEncodingMMImm4Lsl1 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMemEncodingMMImm4Lsl2 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMemEncodingMMSPImm5Lsl2 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMemEncodingMMGPImm7Lsl2 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMemEncodingMMImm9 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMemEncodingMMImm11 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMemEncodingMMImm12 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMemEncodingMMImm16 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMemEncodingMMImm4sp (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getSizeInsEncoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
template<unsigned Bits, int Offset>
unsigned	getUImmWithOffsetEncoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
	Subtract Offset then encode as a N-bit unsigned integer. More...
unsigned	getSimm19Lsl2Encoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getSimm18Lsl3Encoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getUImm3Mod8Encoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getUImm4AndValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMovePRegPairOpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getMovePRegSingleOpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getSimm23Lsl2Encoding (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getExprOpValue (const MCExpr *Expr, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getRegisterListOpValue (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned	getRegisterListOpValue16 (const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Public Member Functions inherited from llvm::MCCodeEmitter
	MCCodeEmitter (const MCCodeEmitter &)=delete
MCCodeEmitter &	operator= (const MCCodeEmitter &)=delete
virtual	~MCCodeEmitter ()
virtual void	reset ()
	Lifetime management. More...

Additional Inherited Members
Protected Member Functions inherited from llvm::MCCodeEmitter
	MCCodeEmitter ()

Detailed Description

Definition at line 31 of file MipsMCCodeEmitter.h.

Constructor & Destructor Documentation

MipsMCCodeEmitter() [1/2]

llvm::MipsMCCodeEmitter::MipsMCCodeEmitter ( const MCInstrInfo &  mcii, MCContext &  Ctx_, bool  IsLittle  )

inline

Definition at line 40 of file MipsMCCodeEmitter.h.

References C, EmitByte(), EmitInstruction(), encodeInstruction(), getBinaryCodeForInstr(), getBranchTarget21OpValue(), getBranchTarget21OpValueMM(), getBranchTarget26OpValue(), getBranchTarget26OpValueMM(), getBranchTarget7OpValueMM(), getBranchTargetOpValue(), getBranchTargetOpValue1SImm16(), getBranchTargetOpValueLsl2MMR6(), getBranchTargetOpValueMM(), getBranchTargetOpValueMMPC10(), getBranchTargetOpValueMMR6(), getExprOpValue(), getJumpOffset16OpValue(), getJumpTargetOpValue(), getJumpTargetOpValueMM(), getMachineOpValue(), getMemEncoding(), getMemEncodingMMGPImm7Lsl2(), getMemEncodingMMImm11(), getMemEncodingMMImm12(), getMemEncodingMMImm16(), getMemEncodingMMImm4(), getMemEncodingMMImm4Lsl1(), getMemEncodingMMImm4Lsl2(), getMemEncodingMMImm4sp(), getMemEncodingMMImm9(), getMemEncodingMMSPImm5Lsl2(), getMovePRegPairOpValue(), getMovePRegSingleOpValue(), getMSAMemEncoding(), getRegisterListOpValue(), getRegisterListOpValue16(), getSimm18Lsl3Encoding(), getSimm19Lsl2Encoding(), getSimm23Lsl2Encoding(), getSImm3Lsa2Value(), getSImm9AddiuspValue(), getSizeInsEncoding(), getUImm3Mod8Encoding(), getUImm4AndValue(), getUImm5Lsl2Encoding(), getUImm6Lsl2Encoding(), getUImmWithOffsetEncoding(), MI, operator=(), Size, and ~MipsMCCodeEmitter().

MipsMCCodeEmitter() [2/2]

llvm::MipsMCCodeEmitter::MipsMCCodeEmitter ( const MipsMCCodeEmitter &  )

delete

~MipsMCCodeEmitter()

llvm::MipsMCCodeEmitter::~MipsMCCodeEmitter ( )

overridedefault

Referenced by MipsMCCodeEmitter().

Member Function Documentation

EmitByte()

void MipsMCCodeEmitter::EmitByte	(	unsigned char	C,
		raw_ostream &	OS
	)		const

Definition at line 129 of file MipsMCCodeEmitter.cpp.

Referenced by EmitInstruction(), and MipsMCCodeEmitter().

EmitInstruction()

void MipsMCCodeEmitter::EmitInstruction	(	uint64_t	Val,
		unsigned	Size,
		const MCSubtargetInfo &	STI,
		raw_ostream &	OS
	)		const

Definition at line 133 of file MipsMCCodeEmitter.cpp.

References EmitByte(), encodeInstruction(), and Size.

Referenced by encodeInstruction(), and MipsMCCodeEmitter().

encodeInstruction()

void MipsMCCodeEmitter::encodeInstruction ( const MCInst &  MI, raw_ostream &  OS, SmallVectorImpl< MCFixup > &  Fixups, const MCSubtargetInfo &  STI  ) const

overridevirtual

encodeInstruction - Emit the instruction.

Size the instruction with Desc.getSize().

Implements llvm::MCCodeEmitter.

Definition at line 154 of file MipsMCCodeEmitter.cpp.

References EmitInstruction(), llvm::MCInstrInfo::get(), getBinaryCodeForInstr(), getBranchTargetOpValue(), getMovePRegPairOpValue(), llvm::MCInst::getOpcode(), llvm::MCInstrDesc::getSize(), llvm_unreachable, LowerLargeShift(), MI, N, llvm::SmallVectorTemplateBase< T >::pop_back(), llvm::MCInst::setOpcode(), Size, and llvm::SmallVectorBase::size().

Referenced by EmitInstruction(), and MipsMCCodeEmitter().

getBinaryCodeForInstr()

uint64_t llvm::MipsMCCodeEmitter::getBinaryCodeForInstr	(	const MCInst &	MI,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Referenced by encodeInstruction(), and MipsMCCodeEmitter().

getBranchTarget21OpValue()

unsigned MipsMCCodeEmitter::getBranchTarget21OpValue	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTarget21OpValue - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 392 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_MIPS_PC21_S2, getBranchTarget21OpValueMM(), llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and llvm::SmallVectorTemplateBase< T >::push_back().

Referenced by getBranchTargetOpValueMM(), and MipsMCCodeEmitter().

getBranchTarget21OpValueMM()

unsigned MipsMCCodeEmitter::getBranchTarget21OpValueMM	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTarget21OpValueMM - Return binary encoding of the branch target operand for microMIPS.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 414 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_MICROMIPS_PC21_S1, getBranchTarget26OpValue(), llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and llvm::SmallVectorTemplateBase< T >::push_back().

Referenced by getBranchTarget21OpValue(), and MipsMCCodeEmitter().

getBranchTarget26OpValue()

unsigned MipsMCCodeEmitter::getBranchTarget26OpValue	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTarget26OpValue - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 436 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_MIPS_PC26_S2, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and llvm::SmallVectorTemplateBase< T >::push_back().

Referenced by getBranchTarget21OpValueMM(), and MipsMCCodeEmitter().

getBranchTarget26OpValueMM()

unsigned MipsMCCodeEmitter::getBranchTarget26OpValueMM	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTarget26OpValueMM - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 457 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_MICROMIPS_PC26_S1, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), getJumpOffset16OpValue(), llvm::MCInst::getOperand(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and llvm::SmallVectorTemplateBase< T >::push_back().

Referenced by MipsMCCodeEmitter().

getBranchTarget7OpValueMM()

unsigned MipsMCCodeEmitter::getBranchTarget7OpValueMM	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTarget7OpValueMM - Return binary encoding of the microMIPS branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 328 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_PC7_S1, getBranchTargetOpValueMMPC10(), llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and llvm::SmallVectorTemplateBase< T >::push_back().

Referenced by getBranchTargetOpValueLsl2MMR6(), and MipsMCCodeEmitter().

getBranchTargetOpValue()

unsigned MipsMCCodeEmitter::getBranchTargetOpValue	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTargetOpValue - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 238 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_Mips_PC16, getBranchTargetOpValue1SImm16(), llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and llvm::SmallVectorTemplateBase< T >::push_back().

Referenced by encodeInstruction(), and MipsMCCodeEmitter().

getBranchTargetOpValue1SImm16()

unsigned MipsMCCodeEmitter::getBranchTargetOpValue1SImm16	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTargetOpValue1SImm16 - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 260 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_Mips_PC16, getBranchTargetOpValueMMR6(), llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and llvm::SmallVectorTemplateBase< T >::push_back().

Referenced by getBranchTargetOpValue(), and MipsMCCodeEmitter().

getBranchTargetOpValueLsl2MMR6()

unsigned MipsMCCodeEmitter::getBranchTargetOpValueLsl2MMR6	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTargetOpValueLsl2MMR6 - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 305 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_Mips_PC16, getBranchTarget7OpValueMM(), llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and llvm::SmallVectorTemplateBase< T >::push_back().

Referenced by getBranchTargetOpValueMMR6(), and MipsMCCodeEmitter().

getBranchTargetOpValueMM()

unsigned MipsMCCodeEmitter::getBranchTargetOpValueMM	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTargetOpValue - Return binary encoding of the microMIPS branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 370 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_PC16_S1, getBranchTarget21OpValue(), llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and llvm::SmallVectorTemplateBase< T >::push_back().

Referenced by getBranchTargetOpValueMMPC10(), and MipsMCCodeEmitter().

getBranchTargetOpValueMMPC10()

unsigned MipsMCCodeEmitter::getBranchTargetOpValueMMPC10	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTargetOpValueMMPC10 - Return binary encoding of the microMIPS 10-bit branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 349 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_PC10_S1, getBranchTargetOpValueMM(), llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and llvm::SmallVectorTemplateBase< T >::push_back().

Referenced by getBranchTarget7OpValueMM(), and MipsMCCodeEmitter().

getBranchTargetOpValueMMR6()

unsigned MipsMCCodeEmitter::getBranchTargetOpValueMMR6	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getBranchTargetOpValueMMR6 - Return binary encoding of the branch target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 282 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::Mips::fixup_Mips_PC16, getBranchTargetOpValueLsl2MMR6(), llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and llvm::SmallVectorTemplateBase< T >::push_back().

Referenced by getBranchTargetOpValue1SImm16(), and MipsMCCodeEmitter().

getExprOpValue()

unsigned MipsMCCodeEmitter::getExprOpValue	(	const MCExpr *	Expr,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 589 of file MipsMCCodeEmitter.cpp.

References llvm::MCExpr::Binary, llvm::MCExpr::Constant, llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_CALL16, llvm::Mips::fixup_MICROMIPS_GOT16, llvm::Mips::fixup_MICROMIPS_GOT_DISP, llvm::Mips::fixup_MICROMIPS_GOT_OFST, llvm::Mips::fixup_MICROMIPS_GOT_PAGE, llvm::Mips::fixup_MICROMIPS_GOTTPREL, llvm::Mips::fixup_MICROMIPS_GPOFF_HI, llvm::Mips::fixup_MICROMIPS_GPOFF_LO, llvm::Mips::fixup_MICROMIPS_HI16, llvm::Mips::fixup_MICROMIPS_HIGHER, llvm::Mips::fixup_MICROMIPS_HIGHEST, llvm::Mips::fixup_MICROMIPS_LO16, llvm::Mips::fixup_MICROMIPS_SUB, llvm::Mips::fixup_MICROMIPS_TLS_DTPREL_HI16, llvm::Mips::fixup_MICROMIPS_TLS_DTPREL_LO16, llvm::Mips::fixup_MICROMIPS_TLS_GD, llvm::Mips::fixup_MICROMIPS_TLS_LDM, llvm::Mips::fixup_MICROMIPS_TLS_TPREL_HI16, llvm::Mips::fixup_MICROMIPS_TLS_TPREL_LO16, llvm::Mips::fixup_Mips_32, llvm::Mips::fixup_Mips_CALL16, llvm::Mips::fixup_Mips_CALL_HI16, llvm::Mips::fixup_Mips_CALL_LO16, llvm::Mips::fixup_Mips_DTPREL_HI, llvm::Mips::fixup_Mips_DTPREL_LO, llvm::Mips::fixup_Mips_GOT, llvm::Mips::fixup_Mips_GOT_DISP, llvm::Mips::fixup_Mips_GOT_HI16, llvm::Mips::fixup_Mips_GOT_LO16, llvm::Mips::fixup_Mips_GOT_OFST, llvm::Mips::fixup_Mips_GOT_PAGE, llvm::Mips::fixup_Mips_GOTTPREL, llvm::Mips::fixup_Mips_GPOFF_HI, llvm::Mips::fixup_Mips_GPOFF_LO, llvm::Mips::fixup_Mips_GPREL16, llvm::Mips::fixup_Mips_HI16, llvm::Mips::fixup_Mips_HIGHER, llvm::Mips::fixup_Mips_HIGHEST, llvm::Mips::fixup_Mips_LO16, llvm::Mips::fixup_MIPS_PCHI16, llvm::Mips::fixup_MIPS_PCLO16, llvm::Mips::fixup_Mips_SUB, llvm::Mips::fixup_Mips_TLSGD, llvm::Mips::fixup_Mips_TLSLDM, llvm::Mips::fixup_Mips_TPREL_HI, llvm::Mips::fixup_Mips_TPREL_LO, llvm::FixupKind(), llvm::MipsMCExpr::getKind(), llvm::MCExpr::getKind(), getMachineOpValue(), llvm::MipsMCExpr::getSubExpr(), llvm::MipsMCExpr::isGpOff(), Kind, llvm_unreachable, llvm::MipsMCExpr::MEK_CALL_HI16, llvm::MipsMCExpr::MEK_CALL_LO16, llvm::MipsMCExpr::MEK_DTPREL, llvm::MipsMCExpr::MEK_DTPREL_HI, llvm::MipsMCExpr::MEK_DTPREL_LO, llvm::MipsMCExpr::MEK_GOT, llvm::MipsMCExpr::MEK_GOT_CALL, llvm::MipsMCExpr::MEK_GOT_DISP, llvm::MipsMCExpr::MEK_GOT_HI16, llvm::MipsMCExpr::MEK_GOT_LO16, llvm::MipsMCExpr::MEK_GOT_OFST, llvm::MipsMCExpr::MEK_GOT_PAGE, llvm::MipsMCExpr::MEK_GOTTPREL, llvm::MipsMCExpr::MEK_GPREL, llvm::MipsMCExpr::MEK_HI, llvm::MipsMCExpr::MEK_HIGHER, llvm::MipsMCExpr::MEK_HIGHEST, llvm::MipsMCExpr::MEK_LO, llvm::MipsMCExpr::MEK_NEG, llvm::MipsMCExpr::MEK_None, llvm::MipsMCExpr::MEK_PCREL_HI16, llvm::MipsMCExpr::MEK_PCREL_LO16, llvm::MipsMCExpr::MEK_Special, llvm::MipsMCExpr::MEK_TLSGD, llvm::MipsMCExpr::MEK_TLSLDM, llvm::MipsMCExpr::MEK_TPREL_HI, llvm::MipsMCExpr::MEK_TPREL_LO, llvm::SmallVectorTemplateBase< T >::push_back(), llvm::MCExpr::SymbolRef, llvm::MCExpr::Target, and llvm::MCSymbolRefExpr::VK_None.

Referenced by getMachineOpValue(), getSImm9AddiuspValue(), and MipsMCCodeEmitter().

getJumpOffset16OpValue()

unsigned MipsMCCodeEmitter::getJumpOffset16OpValue	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getJumpOffset16OpValue - Return binary encoding of the jump target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 480 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCOperand::getImm(), getJumpTargetOpValue(), llvm::MCInst::getOperand(), llvm::MCOperand::isExpr(), and llvm::MCOperand::isImm().

Referenced by getBranchTarget26OpValueMM(), and MipsMCCodeEmitter().

getJumpTargetOpValue()

unsigned MipsMCCodeEmitter::getJumpTargetOpValue	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getJumpTargetOpValue - Return binary encoding of the jump target operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 498 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_Mips_26, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), getJumpTargetOpValueMM(), llvm::MCInst::getOperand(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and llvm::SmallVectorTemplateBase< T >::push_back().

Referenced by getJumpOffset16OpValue(), and MipsMCCodeEmitter().

getJumpTargetOpValueMM()

unsigned MipsMCCodeEmitter::getJumpTargetOpValueMM	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 515 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_26_S1, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), getUImm5Lsl2Encoding(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and llvm::SmallVectorTemplateBase< T >::push_back().

Referenced by getJumpTargetOpValue(), and MipsMCCodeEmitter().

getMachineOpValue()

unsigned MipsMCCodeEmitter::getMachineOpValue	(	const MCInst &	MI,
		const MCOperand &	MO,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

getMachineOpValue - Return binary encoding of operand.

If the machine operand requires relocation, record the relocation and return zero.

Definition at line 744 of file MipsMCCodeEmitter.cpp.

References llvm::lltok::APFloat, assert(), llvm::MCRegisterInfo::getEncodingValue(), llvm::MCOperand::getExpr(), getExprOpValue(), llvm::MCOperand::getFPImm(), llvm::MCOperand::getImm(), llvm::MCOperand::getReg(), llvm::MCContext::getRegisterInfo(), llvm::MCOperand::isExpr(), llvm::MCOperand::isFPImm(), llvm::MCOperand::isImm(), llvm::MCOperand::isReg(), and Reg.

Referenced by getExprOpValue(), getMemEncoding(), getMemEncodingMMGPImm7Lsl2(), getMemEncodingMMImm11(), getMemEncodingMMImm12(), getMemEncodingMMImm16(), getMemEncodingMMImm4(), getMemEncodingMMImm4Lsl1(), getMemEncodingMMImm4Lsl2(), getMemEncodingMMImm4sp(), getMemEncodingMMImm9(), getMemEncodingMMSPImm5Lsl2(), getSimm18Lsl3Encoding(), getSimm19Lsl2Encoding(), getSizeInsEncoding(), getUImm5Lsl2Encoding(), getUImmWithOffsetEncoding(), and MipsMCCodeEmitter().

getMemEncoding()

template<unsigned ShiftAmount>

unsigned MipsMCCodeEmitter::getMemEncoding	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Return binary encoding of memory related operand.

If the offset operand requires relocation, record the relocation.

Definition at line 765 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), getMemEncodingMMImm4(), llvm::MCInst::getOperand(), and llvm::MCOperand::isReg().

Referenced by MipsMCCodeEmitter().

getMemEncodingMMGPImm7Lsl2()

unsigned MipsMCCodeEmitter::getMemEncodingMMGPImm7Lsl2	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 837 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), getMemEncodingMMImm9(), llvm::MCInst::getOperand(), llvm::MCOperand::getReg(), and llvm::MCOperand::isReg().

Referenced by getMemEncodingMMSPImm5Lsl2(), and MipsMCCodeEmitter().

getMemEncodingMMImm11()

unsigned MipsMCCodeEmitter::getMemEncodingMMImm11	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 865 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), getMemEncodingMMImm12(), llvm::MCInst::getOperand(), and llvm::MCOperand::isReg().

Referenced by getMemEncodingMMImm9(), and MipsMCCodeEmitter().

getMemEncodingMMImm12()

unsigned MipsMCCodeEmitter::getMemEncodingMMImm12	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 878 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), getMemEncodingMMImm16(), llvm::MCInst::getNumOperands(), llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), and llvm::MCOperand::isReg().

Referenced by getMemEncodingMMImm11(), and MipsMCCodeEmitter().

getMemEncodingMMImm16()

unsigned MipsMCCodeEmitter::getMemEncodingMMImm16	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 901 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), getMemEncodingMMImm4sp(), llvm::MCInst::getOperand(), and llvm::MCOperand::isReg().

Referenced by getMemEncodingMMImm12(), and MipsMCCodeEmitter().

getMemEncodingMMImm4()

unsigned MipsMCCodeEmitter::getMemEncodingMMImm4	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 780 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), getMemEncodingMMImm4Lsl1(), llvm::MCInst::getOperand(), and llvm::MCOperand::isReg().

Referenced by getMemEncoding(), and MipsMCCodeEmitter().

getMemEncodingMMImm4Lsl1()

unsigned MipsMCCodeEmitter::getMemEncodingMMImm4Lsl1	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 794 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), getMemEncodingMMImm4Lsl2(), llvm::MCInst::getOperand(), and llvm::MCOperand::isReg().

Referenced by getMemEncodingMMImm4(), and MipsMCCodeEmitter().

getMemEncodingMMImm4Lsl2()

unsigned MipsMCCodeEmitter::getMemEncodingMMImm4Lsl2	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 808 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), getMemEncodingMMSPImm5Lsl2(), llvm::MCInst::getOperand(), and llvm::MCOperand::isReg().

Referenced by getMemEncodingMMImm4Lsl1(), and MipsMCCodeEmitter().

getMemEncodingMMImm4sp()

unsigned MipsMCCodeEmitter::getMemEncodingMMImm4sp	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 914 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), llvm::MCInst::getNumOperands(), llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), llvm::MCOperand::isImm(), and llvm::MCOperand::isReg().

Referenced by getMemEncodingMMImm16(), and MipsMCCodeEmitter().

getMemEncodingMMImm9()

unsigned MipsMCCodeEmitter::getMemEncodingMMImm9	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 852 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), getMemEncodingMMImm11(), llvm::MCInst::getOperand(), and llvm::MCOperand::isReg().

Referenced by getMemEncodingMMGPImm7Lsl2(), and MipsMCCodeEmitter().

getMemEncodingMMSPImm5Lsl2()

unsigned MipsMCCodeEmitter::getMemEncodingMMSPImm5Lsl2	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 822 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), getMemEncodingMMGPImm7Lsl2(), llvm::MCInst::getOperand(), llvm::MCOperand::getReg(), and llvm::MCOperand::isReg().

Referenced by getMemEncodingMMImm4Lsl2(), and MipsMCCodeEmitter().

getMovePRegPairOpValue()

unsigned MipsMCCodeEmitter::getMovePRegPairOpValue	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 1073 of file MipsMCCodeEmitter.cpp.

References llvm::MCInst::getOperand(), and llvm::MCOperand::getReg().

Referenced by encodeInstruction(), and MipsMCCodeEmitter().

getMovePRegSingleOpValue()

unsigned MipsMCCodeEmitter::getMovePRegSingleOpValue	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 1107 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCInst::getOperand(), llvm::MCOperand::getReg(), llvm::MCOperand::isReg(), and llvm_unreachable.

Referenced by MipsMCCodeEmitter().

getMSAMemEncoding()

unsigned llvm::MipsMCCodeEmitter::getMSAMemEncoding	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Referenced by MipsMCCodeEmitter().

getRegisterListOpValue()

unsigned MipsMCCodeEmitter::getRegisterListOpValue	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 1046 of file MipsMCCodeEmitter.cpp.

References E, llvm::MCRegisterInfo::getEncodingValue(), llvm::MCInst::getNumOperands(), llvm::MCInst::getOperand(), llvm::MCOperand::getReg(), llvm::MCContext::getRegisterInfo(), I, and Reg.

Referenced by MipsMCCodeEmitter().

getRegisterListOpValue16()

unsigned MipsMCCodeEmitter::getRegisterListOpValue16	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 1066 of file MipsMCCodeEmitter.cpp.

References llvm::MCInst::getNumOperands().

Referenced by MipsMCCodeEmitter().

getSimm18Lsl3Encoding()

unsigned MipsMCCodeEmitter::getSimm18Lsl3Encoding	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 987 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_PC18_S3, llvm::Mips::fixup_MIPS_PC18_S3, llvm::FixupKind(), llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCInst::getOperand(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and llvm::SmallVectorTemplateBase< T >::push_back().

Referenced by MipsMCCodeEmitter().

getSimm19Lsl2Encoding()

unsigned MipsMCCodeEmitter::getSimm19Lsl2Encoding	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 965 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCFixup::create(), llvm::Mips::fixup_MICROMIPS_PC19_S2, llvm::Mips::fixup_MIPS_PC19_S2, llvm::FixupKind(), llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCInst::getOperand(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), and llvm::SmallVectorTemplateBase< T >::push_back().

Referenced by MipsMCCodeEmitter().

getSimm23Lsl2Encoding()

unsigned MipsMCCodeEmitter::getSimm23Lsl2Encoding	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 1130 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), and llvm::MCOperand::isImm().

Referenced by MipsMCCodeEmitter().

getSImm3Lsa2Value()

unsigned MipsMCCodeEmitter::getSImm3Lsa2Value	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 550 of file MipsMCCodeEmitter.cpp.

References llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), getUImm6Lsl2Encoding(), and llvm::MCOperand::isImm().

Referenced by getUImm5Lsl2Encoding(), and MipsMCCodeEmitter().

getSImm9AddiuspValue()

unsigned MipsMCCodeEmitter::getSImm9AddiuspValue	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 576 of file MipsMCCodeEmitter.cpp.

References getExprOpValue(), llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), and llvm::MCOperand::isImm().

Referenced by getUImm6Lsl2Encoding(), and MipsMCCodeEmitter().

getSizeInsEncoding()

unsigned MipsMCCodeEmitter::getSizeInsEncoding	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 942 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), llvm::MCInst::getOperand(), llvm::MCOperand::isImm(), and Size.

Referenced by MipsMCCodeEmitter().

getUImm3Mod8Encoding()

unsigned MipsMCCodeEmitter::getUImm3Mod8Encoding	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 1009 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), and llvm::MCOperand::isImm().

Referenced by MipsMCCodeEmitter().

getUImm4AndValue()

unsigned MipsMCCodeEmitter::getUImm4AndValue	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 1018 of file MipsMCCodeEmitter.cpp.

References assert(), llvm::MCInst::getOperand(), llvm::MCOperand::isImm(), and llvm_unreachable.

Referenced by MipsMCCodeEmitter().

getUImm5Lsl2Encoding()

unsigned MipsMCCodeEmitter::getUImm5Lsl2Encoding	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 532 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), llvm::MCInst::getOperand(), getSImm3Lsa2Value(), llvm::MCOperand::isExpr(), and llvm::MCOperand::isImm().

Referenced by getJumpTargetOpValueMM(), and MipsMCCodeEmitter().

getUImm6Lsl2Encoding()

unsigned MipsMCCodeEmitter::getUImm6Lsl2Encoding	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Definition at line 563 of file MipsMCCodeEmitter.cpp.

References llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), getSImm9AddiuspValue(), and llvm::MCOperand::isImm().

Referenced by getSImm3Lsa2Value(), and MipsMCCodeEmitter().

getUImmWithOffsetEncoding()

template<unsigned Bits, int Offset>

unsigned MipsMCCodeEmitter::getUImmWithOffsetEncoding	(	const MCInst &	MI,
		unsigned	OpNo,
		SmallVectorImpl< MCFixup > &	Fixups,
		const MCSubtargetInfo &	STI
	)		const

Subtract Offset then encode as a N-bit unsigned integer.

Definition at line 955 of file MipsMCCodeEmitter.cpp.

References assert(), getMachineOpValue(), llvm::MCInst::getOperand(), and llvm::MCOperand::isImm().

Referenced by MipsMCCodeEmitter().

operator=()

MipsMCCodeEmitter& llvm::MipsMCCodeEmitter::operator= ( const MipsMCCodeEmitter &  )

delete

Referenced by MipsMCCodeEmitter().

---

The documentation for this class was generated from the following files:

• lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
• lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp