LLVM  8.0.1
Public Member Functions | Static Public Member Functions | List of all members
llvm::AMDGPUCallLowering Class Reference

#include "Target/AMDGPU/AMDGPUCallLowering.h"

Inheritance diagram for llvm::AMDGPUCallLowering:
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Collaboration diagram for llvm::AMDGPUCallLowering:
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Public Member Functions

 AMDGPUCallLowering (const AMDGPUTargetLowering &TLI)
 
bool lowerReturn (MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef< unsigned > VRegs) const override
 This hook must be implemented to lower outgoing return values, described by Val, into the specified virtual registers VRegs. More...
 
bool lowerFormalArguments (MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef< unsigned > VRegs) const override
 This hook must be implemented to lower the incoming (formal) arguments, described by Args, for GlobalISel. More...
 
- Public Member Functions inherited from llvm::CallLowering
 CallLowering (const TargetLowering *TLI)
 
virtual ~CallLowering ()=default
 
virtual bool lowerCall (MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv, const MachineOperand &Callee, const ArgInfo &OrigRet, ArrayRef< ArgInfo > OrigArgs) const
 This hook must be implemented to lower the given call instruction, including argument and return value marshalling. More...
 
bool lowerCall (MachineIRBuilder &MIRBuilder, ImmutableCallSite CS, unsigned ResReg, ArrayRef< unsigned > ArgRegs, std::function< unsigned()> GetCalleeReg) const
 Lower the given call instruction, including argument and return value marshalling. More...
 

Static Public Member Functions

static CCAssignFnCCAssignFnForCall (CallingConv::ID CC, bool IsVarArg)
 
static CCAssignFnCCAssignFnForReturn (CallingConv::ID CC, bool IsVarArg)
 

Additional Inherited Members

- Protected Member Functions inherited from llvm::CallLowering
const TargetLoweringgetTLI () const
 Getter for generic TargetLowering class. More...
 
template<class XXXTargetLowering >
const XXXTargetLowering * getTLI () const
 Getter for target specific TargetLowering class. More...
 
template<typename FuncInfoTy >
void setArgFlags (ArgInfo &Arg, unsigned OpIdx, const DataLayout &DL, const FuncInfoTy &FuncInfo) const
 
bool handleAssignments (MachineIRBuilder &MIRBuilder, ArrayRef< ArgInfo > Args, ValueHandler &Handler) const
 Invoke Handler::assignArg on each of the given Args and then use Callback to move them to the assigned locations. More...
 

Detailed Description

Definition at line 25 of file AMDGPUCallLowering.h.

Constructor & Destructor Documentation

◆ AMDGPUCallLowering()

AMDGPUCallLowering::AMDGPUCallLowering ( const AMDGPUTargetLowering TLI)

Definition at line 30 of file AMDGPUCallLowering.cpp.

Member Function Documentation

◆ CCAssignFnForCall()

CCAssignFn * AMDGPUCallLowering::CCAssignFnForCall ( CallingConv::ID  CC,
bool  IsVarArg 
)
static

◆ CCAssignFnForReturn()

CCAssignFn * AMDGPUCallLowering::CCAssignFnForReturn ( CallingConv::ID  CC,
bool  IsVarArg 
)
static

◆ lowerFormalArguments()

bool AMDGPUCallLowering::lowerFormalArguments ( MachineIRBuilder MIRBuilder,
const Function F,
ArrayRef< unsigned VRegs 
) const
overridevirtual

This hook must be implemented to lower the incoming (formal) arguments, described by Args, for GlobalISel.

Each argument must end up in the related virtual register described by VRegs. In other words, the first argument should end up in VRegs[0], the second in VRegs[1], and so on. MIRBuilder is set to the proper insertion for the argument lowering.

Returns
True if the lowering succeeded, false otherwise.

Reimplemented from llvm::CallLowering.

Definition at line 90 of file AMDGPUCallLowering.cpp.

References llvm::SIMachineFunctionInfo::addDispatchID(), llvm::SIMachineFunctionInfo::addDispatchPtr(), llvm::SIMachineFunctionInfo::addFlatScratchInit(), llvm::SIMachineFunctionInfo::addKernargSegmentPtr(), llvm::MachineBasicBlock::addLiveIn(), llvm::MachineFunction::addLiveIn(), llvm::SIMachineFunctionInfo::addPrivateSegmentBuffer(), llvm::SIMachineFunctionInfo::addQueuePtr(), llvm::alignTo(), llvm::CallingConv::AMDGPU_GS, llvm::CallingConv::AMDGPU_HS, llvm::CallingConv::AMDGPU_KERNEL, llvm::CallingConv::AMDGPU_PS, llvm::CallingConv::AMDGPU_VS, Arg, llvm::Function::arg_begin(), llvm::Function::arg_size(), llvm::Function::args(), llvm::MachineIRBuilder::buildCopy(), CCAssignFnForCall(), AMDGPUAS::CONSTANT_ADDRESS, llvm::CCValAssign::Full, llvm::DataLayout::getABITypeAlignment(), llvm::Function::getCallingConv(), llvm::Function::getContext(), llvm::Module::getDataLayout(), llvm::AMDGPUSubtarget::getExplicitKernelArgOffset(), llvm::MachineFunction::getInfo(), llvm::CCValAssign::getLocReg(), llvm::MachineIRBuilder::getMBB(), llvm::MachineIRBuilder::getMF(), llvm::GlobalValue::getParent(), llvm::MachineFunction::getRegInfo(), llvm::EVT::getSimpleVT(), llvm::MachineFunction::getSubtarget(), llvm::Value::getType(), llvm::DataLayout::getTypeAllocSize(), llvm::TargetLoweringBase::getValueType(), llvm::EVT::getVectorElementType(), llvm::SIMachineFunctionInfo::hasDispatchID(), llvm::SIMachineFunctionInfo::hasDispatchPtr(), llvm::SIMachineFunctionInfo::hasFlatScratchInit(), llvm::SIMachineFunctionInfo::hasKernargSegmentPtr(), llvm::SIMachineFunctionInfo::hasPrivateSegmentBuffer(), llvm::SIMachineFunctionInfo::hasQueuePtr(), Info, llvm::SIMachineFunctionInfo::isPSInputAllocated(), llvm::EVT::isSimple(), llvm::Function::isVarArg(), llvm::EVT::isVector(), llvm::SIMachineFunctionInfo::markPSInputAllocated(), llvm::SIMachineFunctionInfo::markPSInputEnabled(), llvm::MinAlign(), MRI, llvm::LLT::pointer(), llvm::BitVector::set(), llvm::CallLowering::setArgFlags(), llvm::ISD::ArgFlagsTy::setOrigAlign(), llvm::BitVector::test(), TRI, and llvm::Value::use_empty().

◆ lowerReturn()

bool AMDGPUCallLowering::lowerReturn ( MachineIRBuilder MIRBuilder,
const Value Val,
ArrayRef< unsigned VRegs 
) const
overridevirtual

The documentation for this class was generated from the following files: