llvm::RegisterClassInfo Class Reference

#include "llvm/CodeGen/RegisterClassInfo.h"

Public Member Functions
	RegisterClassInfo ()
void	runOnMachineFunction (const MachineFunction &MF)
	runOnFunction - Prepare to answer questions about MF. More...
unsigned	getNumAllocatableRegs (const TargetRegisterClass *RC) const
	getNumAllocatableRegs - Returns the number of actually allocatable registers in RC in the current function. More...
ArrayRef< MCPhysReg >	getOrder (const TargetRegisterClass *RC) const
	getOrder - Returns the preferred allocation order for RC. More...
bool	isProperSubClass (const TargetRegisterClass *RC) const
	isProperSubClass - Returns true if RC has a legal super-class with more allocatable registers. More...
unsigned	getLastCalleeSavedAlias (unsigned PhysReg) const
	getLastCalleeSavedAlias - Returns the last callee saved register that overlaps PhysReg, or 0 if Reg doesn't overlap a CalleeSavedAliases. More...
unsigned	getMinCost (const TargetRegisterClass *RC)
	Get the minimum register cost in RC's allocation order. More...
unsigned	getLastCostChange (const TargetRegisterClass *RC)
	Get the position of the last cost change in getOrder(RC). More...
unsigned	getRegPressureSetLimit (unsigned Idx) const
	Get the register unit limit for the given pressure set index. More...

Protected Member Functions
unsigned	computePSetLimit (unsigned Idx) const
	This is not accurate because two overlapping register sets may have some nonoverlapping reserved registers. More...

Detailed Description

Definition at line 31 of file RegisterClassInfo.h.

Constructor & Destructor Documentation

RegisterClassInfo()

RegisterClassInfo::RegisterClassInfo ( )

default

Member Function Documentation

computePSetLimit()

unsigned RegisterClassInfo::computePSetLimit ( unsigned  Idx ) const

protected

This is not accurate because two overlapping register sets may have some nonoverlapping reserved registers.

However, computing the allocation order for all register classes would be too expensive.

Definition at line 168 of file RegisterClassInfo.cpp.

References C, getNumAllocatableRegs(), llvm::TargetRegisterClass::getNumRegs(), llvm::TargetRegisterInfo::getRegClassPressureSets(), llvm::TargetRegisterInfo::getRegClassWeight(), llvm::TargetRegisterInfo::getRegPressureSetLimit(), llvm::TargetRegisterInfo::regclasses(), llvm::RegClassWeight::RegWeight, and llvm::RegClassWeight::WeightLimit.

Referenced by getRegPressureSetLimit().

getLastCalleeSavedAlias()

unsigned llvm::RegisterClassInfo::getLastCalleeSavedAlias ( unsigned  PhysReg ) const

inline

getLastCalleeSavedAlias - Returns the last callee saved register that overlaps PhysReg, or 0 if Reg doesn't overlap a CalleeSavedAliases.

Definition at line 113 of file RegisterClassInfo.h.

References assert(), llvm::TargetRegisterInfo::isPhysicalRegister(), and llvm::SmallVectorBase::size().

getLastCostChange()

unsigned llvm::RegisterClassInfo::getLastCostChange ( const TargetRegisterClass *  RC )

inline

Get the position of the last cost change in getOrder(RC).

All registers in getOrder(RC).slice(getLastCostChange(RC)) will have the same cost according to TRI->getCostPerUse().

Definition at line 131 of file RegisterClassInfo.h.

getMinCost()

unsigned llvm::RegisterClassInfo::getMinCost ( const TargetRegisterClass *  RC )

inline

Get the minimum register cost in RC's allocation order.

This is the smallest value returned by TRI->getCostPerUse(Reg) for all the registers in getOrder(RC).

Definition at line 123 of file RegisterClassInfo.h.

getNumAllocatableRegs()

unsigned llvm::RegisterClassInfo::getNumAllocatableRegs ( const TargetRegisterClass *  RC ) const

inline

getNumAllocatableRegs - Returns the number of actually allocatable registers in RC in the current function.

Definition at line 90 of file RegisterClassInfo.h.

Referenced by computePSetLimit(), getNumAllocatableRegsForConstraints(), llvm::GCNMaxOccupancySchedStrategy::initialize(), and runOnMachineFunction().

getOrder()

ArrayRef<MCPhysReg> llvm::RegisterClassInfo::getOrder ( const TargetRegisterClass *  RC ) const

inline

getOrder - Returns the preferred allocation order for RC.

The order contains no reserved registers, and registers that alias callee saved registers come last.

Definition at line 97 of file RegisterClassInfo.h.

Referenced by llvm::RegAllocBase::allocatePhysRegs(), llvm::AllocationOrder::AllocationOrder(), llvm::createBreakFalseDeps(), CriticalPathStep(), and INITIALIZE_PASS().

getRegPressureSetLimit()

unsigned llvm::RegisterClassInfo::getRegPressureSetLimit ( unsigned  Idx ) const

inline

Get the register unit limit for the given pressure set index.

RegisterClassInfo adjusts this limit for reserved registers.

Definition at line 138 of file RegisterClassInfo.h.

References computePSetLimit().

Referenced by computeExcessPressureDelta().

isProperSubClass()

bool llvm::RegisterClassInfo::isProperSubClass ( const TargetRegisterClass *  RC ) const

inline

isProperSubClass - Returns true if RC has a legal super-class with more allocatable registers.

Register classes like GR32_NOSP are not proper sub-classes because esp is not allocatable. Similarly, tGPR is not a proper sub-class in Thumb mode because the GPR super-class is not legal.

Definition at line 107 of file RegisterClassInfo.h.

runOnMachineFunction()

void RegisterClassInfo::runOnMachineFunction

(

const MachineFunction &

MF

)

runOnFunction - Prepare to answer questions about MF.

This must be called before any other methods are used.

Definition at line 44 of file RegisterClassInfo.cpp.

References assert(), llvm::dbgs(), llvm::MachineRegisterInfo::getCalleeSavedRegs(), llvm::TargetRegisterInfo::getCostPerUse(), llvm::TargetRegisterClass::getID(), llvm::TargetRegisterInfo::getLargestLegalSuperClass(), getNumAllocatableRegs(), llvm::TargetRegisterInfo::getNumRegClasses(), llvm::TargetRegisterInfo::getNumRegPressureSets(), llvm::TargetRegisterClass::getNumRegs(), llvm::MCRegisterInfo::getNumRegs(), llvm::TargetRegisterClass::getRawAllocationOrder(), llvm::TargetRegisterInfo::getRegClassName(), llvm::MachineFunction::getRegInfo(), llvm::TargetSubtargetInfo::getRegisterInfo(), llvm::MachineRegisterInfo::getReservedRegs(), llvm::MachineFunction::getSubtarget(), I, llvm::MCRegAliasIterator::isValid(), LLVM_DEBUG, N, llvm::printReg(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::SmallVectorImpl< T >::resize(), llvm::SmallVectorBase::size(), llvm::ArrayRef< T >::size(), llvm::BitVector::size(), StressRA, and llvm::BitVector::test().

Referenced by llvm::RegAllocBase::init(), INITIALIZE_PASS(), isTerminalReg(), and llvm::BreakFalseDeps::runOnMachineFunction().

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The documentation for this class was generated from the following files:

• include/llvm/CodeGen/RegisterClassInfo.h
• lib/CodeGen/RegisterClassInfo.cpp