LLVM
8.0.1
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#include "Target/ARC/ARCInstrInfo.h"
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ARCInstrInfo () | |
const ARCRegisterInfo & | getRegisterInfo () const |
unsigned | isLoadFromStackSlot (const MachineInstr &MI, int &FrameIndex) const override |
If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot. More... | |
unsigned | isStoreToStackSlot (const MachineInstr &MI, int &FrameIndex) const override |
If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot. More... | |
unsigned | getInstSizeInBytes (const MachineInstr &MI) const override |
bool | analyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override |
Analyze the branching code at the end of MBB, returning true if it cannot be understood (e.g. More... | |
unsigned | insertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &dl, int *BytesAdded=nullptr) const override |
unsigned | removeBranch (MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override |
void | copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &dl, unsigned DestReg, unsigned SrcReg, bool KillSrc) const override |
void | storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override |
void | loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override |
bool | reverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const override |
Return the inverse opcode of the specified Branch instruction. More... | |
MachineBasicBlock::iterator | loadImmediate (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned Reg, uint64_t Value) const |
Definition at line 27 of file ARCInstrInfo.h.
ARCInstrInfo::ARCInstrInfo | ( | ) |
Definition at line 34 of file ARCInstrInfo.cpp.
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Analyze the branching code at the end of MBB, returning true if it cannot be understood (e.g.
it's a switch dispatch or isn't implemented for a target). Upon success, this returns false and returns with the following information in various cases:
Note that RemoveBranch and InsertBranch must be implemented to support cases where this method returns success.
If AllowModify is true, then this routine is allowed to modify the basic block (e.g. delete instructions after the unconditional branch).
Definition at line 158 of file ARCInstrInfo.cpp.
References assert(), llvm::MachineBasicBlock::begin(), llvm::SmallVectorImpl< T >::clear(), llvm::SmallVectorBase::empty(), llvm::MachineBasicBlock::end(), llvm::MachineInstr::eraseFromParent(), I, llvm::isCondBranchOpcode(), isJumpOpcode(), llvm::HexagonMCInstrInfo::isPredicated(), llvm::isUncondBranchOpcode(), and llvm::SmallVectorTemplateBase< T >::push_back().
Referenced by getRegisterInfo().
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Definition at line 269 of file ARCInstrInfo.cpp.
References llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), contains(), and llvm::getKillRegState().
Referenced by getRegisterInfo().
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Definition at line 391 of file ARCInstrInfo.cpp.
References llvm::MachineInstr::getDesc(), llvm::TargetMachine::getMCAsmInfo(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), llvm::MCInstrDesc::getSize(), llvm::MachineOperand::getSymbolName(), llvm::MachineFunction::getTarget(), and llvm::ISD::INLINEASM.
Referenced by getRegisterInfo().
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Definition at line 34 of file ARCInstrInfo.h.
References analyzeBranch(), copyPhysReg(), llvm::ISD::FrameIndex, getInstSizeInBytes(), I, insertBranch(), isLoadFromStackSlot(), isStoreToStackSlot(), loadImmediate(), loadRegFromStackSlot(), MI, Reg, removeBranch(), reverseBranchCondition(), storeRegToStackSlot(), and TRI.
Referenced by llvm::ARCSubtarget::getRegisterInfo().
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Definition at line 358 of file ARCInstrInfo.cpp.
References llvm::MachineInstrBuilder::add(), llvm::MachineInstrBuilder::addMBB(), assert(), llvm::ISD::BR, llvm::BuildMI(), llvm::ArrayRef< T >::empty(), and llvm::ArrayRef< T >::size().
Referenced by getRegisterInfo().
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If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot.
If not, return 0. This predicate must return 0 if the instruction has any side effects other than loading from the stack slot.
Definition at line 56 of file ARCInstrInfo.cpp.
References llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), llvm::MachineOperand::isImm(), isLoad(), and isZeroImm().
Referenced by getRegisterInfo().
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If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot.
If not, return 0. This predicate must return 0 if the instruction has any side effects other than storing to the stack slot.
Definition at line 75 of file ARCInstrInfo.cpp.
References llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), llvm::MachineOperand::isImm(), isStore(), and isZeroImm().
Referenced by getRegisterInfo().
MachineBasicBlock::iterator ARCInstrInfo::loadImmediate | ( | MachineBasicBlock & | MBB, |
MachineBasicBlock::iterator | MI, | ||
unsigned | Reg, | ||
uint64_t | Value | ||
) | const |
Definition at line 346 of file ARCInstrInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::BuildMI(), llvm::MachineBasicBlock::findDebugLoc(), llvm::MachineInstrBuilder::getInstr(), and llvm_unreachable.
Referenced by getRegisterInfo().
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Definition at line 310 of file ARCInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::MachineInstrBuilder::addReg(), llvm::AMDGPU::HSAMD::Kernel::Arg::Key::Align, assert(), llvm::BuildMI(), llvm::dbgs(), llvm::RegState::Define, llvm::MachineBasicBlock::findDebugLoc(), llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineFrameInfo::getObjectAlignment(), llvm::MachineFrameInfo::getObjectSize(), llvm::MachineBasicBlock::getParent(), llvm::TargetRegisterInfo::getSpillSize(), LLVM_DEBUG, llvm::MachineMemOperand::MOLoad, and llvm::printReg().
Referenced by getRegisterInfo().
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Definition at line 242 of file ARCInstrInfo.cpp.
References assert(), llvm::MachineBasicBlock::begin(), llvm::MachineBasicBlock::end(), llvm::MachineBasicBlock::getLastNonDebugInstr(), I, llvm::isCondBranchOpcode(), and llvm::isUncondBranchOpcode().
Referenced by getRegisterInfo().
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Return the inverse opcode of the specified Branch instruction.
Definition at line 338 of file ARCInstrInfo.cpp.
References assert(), GetOppositeBranchCondition(), and llvm::SmallVectorBase::size().
Referenced by getRegisterInfo().
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Definition at line 281 of file ARCInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::MachineInstrBuilder::addReg(), llvm::AMDGPU::HSAMD::Kernel::Arg::Key::Align, assert(), llvm::BuildMI(), llvm::dbgs(), llvm::MachineBasicBlock::findDebugLoc(), llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::getKillRegState(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineFrameInfo::getObjectAlignment(), llvm::MachineFrameInfo::getObjectSize(), llvm::MachineBasicBlock::getParent(), llvm::TargetRegisterInfo::getSpillSize(), LLVM_DEBUG, llvm::MachineMemOperand::MOStore, and llvm::printReg().
Referenced by getRegisterInfo().