LLVM  8.0.1
X86TargetTransformInfo.h
Go to the documentation of this file.
1 //===-- X86TargetTransformInfo.h - X86 specific TTI -------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 /// \file
10 /// This file a TargetTransformInfo::Concept conforming object specific to the
11 /// X86 target machine. It uses the target's detailed information to
12 /// provide more precise answers to certain TTI queries, while letting the
13 /// target independent and default TTI implementations handle the rest.
14 ///
15 //===----------------------------------------------------------------------===//
16 
17 #ifndef LLVM_LIB_TARGET_X86_X86TARGETTRANSFORMINFO_H
18 #define LLVM_LIB_TARGET_X86_X86TARGETTRANSFORMINFO_H
19 
20 #include "X86.h"
21 #include "X86TargetMachine.h"
25 
26 namespace llvm {
27 
28 class X86TTIImpl : public BasicTTIImplBase<X86TTIImpl> {
30  typedef TargetTransformInfo TTI;
31  friend BaseT;
32 
33  const X86Subtarget *ST;
34  const X86TargetLowering *TLI;
35 
36  const X86Subtarget *getST() const { return ST; }
37  const X86TargetLowering *getTLI() const { return TLI; }
38 
39 public:
40  explicit X86TTIImpl(const X86TargetMachine *TM, const Function &F)
41  : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
42  TLI(ST->getTargetLowering()) {}
43 
44  /// \name Scalar TTI Implementations
45  /// @{
46  TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
47 
48  /// @}
49 
50  /// \name Cache TTI Implementation
51  /// @{
56  /// @}
57 
58  /// \name Vector TTI Implementations
59  /// @{
60 
61  unsigned getNumberOfRegisters(bool Vector);
62  unsigned getRegisterBitWidth(bool Vector) const;
63  unsigned getLoadStoreVecRegBitWidth(unsigned AS) const;
64  unsigned getMaxInterleaveFactor(unsigned VF);
66  unsigned Opcode, Type *Ty,
72  int getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, Type *SubTp);
73  int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
74  const Instruction *I = nullptr);
75  int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
76  const Instruction *I = nullptr);
77  int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
78  int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
79  unsigned AddressSpace, const Instruction *I = nullptr);
80  int getMaskedMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
81  unsigned AddressSpace);
82  int getGatherScatterOpCost(unsigned Opcode, Type *DataTy, Value *Ptr,
83  bool VariableMask, unsigned Alignment);
85  const SCEV *Ptr);
86 
87  unsigned getAtomicMemIntrinsicMaxElementSize() const;
88 
91  unsigned ScalarizationCostPassed = UINT_MAX);
94  unsigned VF = 1);
95 
96  int getArithmeticReductionCost(unsigned Opcode, Type *Ty,
97  bool IsPairwiseForm);
98 
99  int getMinMaxReductionCost(Type *Ty, Type *CondTy, bool IsPairwiseForm,
100  bool IsUnsigned);
101 
102  int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy,
103  unsigned Factor, ArrayRef<unsigned> Indices,
104  unsigned Alignment, unsigned AddressSpace,
105  bool UseMaskForCond = false,
106  bool UseMaskForGaps = false);
107  int getInterleavedMemoryOpCostAVX512(unsigned Opcode, Type *VecTy,
108  unsigned Factor, ArrayRef<unsigned> Indices,
109  unsigned Alignment, unsigned AddressSpace,
110  bool UseMaskForCond = false,
111  bool UseMaskForGaps = false);
112  int getInterleavedMemoryOpCostAVX2(unsigned Opcode, Type *VecTy,
113  unsigned Factor, ArrayRef<unsigned> Indices,
114  unsigned Alignment, unsigned AddressSpace,
115  bool UseMaskForCond = false,
116  bool UseMaskForGaps = false);
117 
118  int getIntImmCost(int64_t);
119 
120  int getIntImmCost(const APInt &Imm, Type *Ty);
121 
122  unsigned getUserCost(const User *U, ArrayRef<const Value *> Operands);
123 
124  int getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty);
125  int getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
126  Type *Ty);
129  bool canMacroFuseCmp();
131  bool isLegalMaskedStore(Type *DataType);
132  bool isLegalMaskedGather(Type *DataType);
133  bool isLegalMaskedScatter(Type *DataType);
134  bool hasDivRemOp(Type *DataType, bool IsSigned);
136  bool areInlineCompatible(const Function *Caller,
137  const Function *Callee) const;
139  bool IsZeroCmp) const;
141 private:
142  int getGSScalarCost(unsigned Opcode, Type *DataTy, bool VariableMask,
143  unsigned Alignment, unsigned AddressSpace);
144  int getGSVectorCost(unsigned Opcode, Type *DataTy, Value *Ptr,
145  unsigned Alignment, unsigned AddressSpace);
146 
147  /// @}
148 };
149 
150 } // end namespace llvm
151 
152 #endif
llvm::Optional< unsigned > getCacheSize(TargetTransformInfo::CacheLevel Level) const
This class represents lattice values for constants.
Definition: AllocatorList.h:24
int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index)
bool isFCmpOrdCheaperThanFCmpZero(Type *Ty)
int getGatherScatterOpCost(unsigned Opcode, Type *DataTy, Value *Ptr, bool VariableMask, unsigned Alignment)
Calculate the cost of Gather / Scatter operation.
The main scalar evolution driver.
unsigned getRegisterBitWidth(bool Vector) const
bool isLegalMaskedScatter(Type *DataType)
F(f)
Base class which can be used to help build a TTI implementation.
Definition: BasicTTIImpl.h:78
unsigned getAtomicMemIntrinsicMaxElementSize() const
unsigned getNumberOfRegisters(bool Vector)
unsigned getMaxInterleaveFactor(unsigned VF)
bool areInlineCompatible(const Function *Caller, const Function *Callee) const
bool isLegalMaskedStore(Type *DataType)
int getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::OperandValueKind Opd1Info=TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info=TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo=TTI::OP_None, TTI::OperandValueProperties Opd2PropInfo=TTI::OP_None, ArrayRef< const Value *> Args=ArrayRef< const Value *>())
int getInterleavedMemoryOpCostAVX2(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, unsigned Alignment, unsigned AddressSpace, bool UseMaskForCond=false, bool UseMaskForGaps=false)
bool isLSRCostLess(TargetTransformInfo::LSRCost &C1, TargetTransformInfo::LSRCost &C2)
PopcntSupportKind
Flags indicating the kind of support for population count.
llvm::Optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:33
int getAddressComputationCost(Type *PtrTy, ScalarEvolution *SE, const SCEV *Ptr)
amdgpu Simplify well known AMD library false Value * Callee
If not nullptr, enable inline expansion of memcmp.
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:46
bool isLegalMaskedGather(Type *DataType)
int getInterleavedMemoryOpCostAVX512(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, unsigned Alignment, unsigned AddressSpace, bool UseMaskForCond=false, bool UseMaskForGaps=false)
bool isLegalMaskedLoad(Type *DataType)
const TTI::MemCmpExpansionOptions * enableMemCmpExpansion(bool IsZeroCmp) const
int getMaskedMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment, unsigned AddressSpace)
This file provides a helper that implements much of the TTI interface in terms of the target-independ...
int getArithmeticReductionCost(unsigned Opcode, Type *Ty, bool IsPairwiseForm)
unsigned getUserCost(const User *U, ArrayRef< const Value *> Operands)
int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment, unsigned AddressSpace, const Instruction *I=nullptr)
int getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, Type *SubTp)
TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth)
OperandValueProperties
Additional properties of an operand&#39;s values.
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
AddressSpace
Definition: NVPTXBaseInfo.h:22
int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, const Instruction *I=nullptr)
int getMinMaxReductionCost(Type *Ty, Type *CondTy, bool IsPairwiseForm, bool IsUnsigned)
Class for arbitrary precision integers.
Definition: APInt.h:70
unsigned getLoadStoreVecRegBitWidth(unsigned AS) const
This class represents an analyzed expression in the program.
int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, const Instruction *I=nullptr)
#define I(x, y, z)
Definition: MD5.cpp:58
const unsigned Kind
LLVM Value Representation.
Definition: Value.h:73
bool hasDivRemOp(Type *DataType, bool IsSigned)
static const Function * getParent(const Value *V)
const DataLayout & getDataLayout() const
Convenience struct for specifying and reasoning about fast-math flags.
Definition: Operator.h:160
OperandValueKind
Additional information about an operand&#39;s possible values.
This pass exposes codegen information to IR-level passes.
CacheLevel
The possible cache levels.
X86TTIImpl(const X86TargetMachine *TM, const Function &F)
int getIntrinsicInstrCost(Intrinsic::ID IID, Type *RetTy, ArrayRef< Type *> Tys, FastMathFlags FMF, unsigned ScalarizationCostPassed=UINT_MAX)
int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, unsigned Alignment, unsigned AddressSpace, bool UseMaskForCond=false, bool UseMaskForGaps=false)
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
int getIntImmCost(int64_t)
Calculate the cost of materializing a 64-bit value.
This file describes how to lower LLVM code to machine code.
ShuffleKind
The various kinds of shuffle patterns for vector queries.