LLVM  8.0.1
AArch64LegalizerInfo.h
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1 //===- AArch64LegalizerInfo --------------------------------------*- C++ -*-==//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 /// \file
10 /// This file declares the targeting of the Machinelegalizer class for
11 /// AArch64.
12 /// \todo This should be generated by TableGen.
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64MACHINELEGALIZER_H
16 #define LLVM_LIB_TARGET_AARCH64_AARCH64MACHINELEGALIZER_H
17 
20 
21 namespace llvm {
22 
23 class LLVMContext;
24 class AArch64Subtarget;
25 
26 /// This class provides the information for the target register banks.
28 public:
30 
32  MachineIRBuilder &MIRBuilder,
33  GISelChangeObserver &Observer) const override;
34 
35 private:
36  bool legalizeVaArg(MachineInstr &MI, MachineRegisterInfo &MRI,
37  MachineIRBuilder &MIRBuilder) const;
38 };
39 } // End llvm namespace.
40 #endif
This class represents lattice values for constants.
Definition: AllocatorList.h:24
This class provides the information for the target register banks.
Abstract class that contains various methods for clients to notify about changes. ...
unsigned const MachineRegisterInfo * MRI
AArch64LegalizerInfo(const AArch64Subtarget &ST)
Helper class to build MachineInstr.
bool legalizeCustom(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, GISelChangeObserver &Observer) const override
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:64
IRTranslator LLVM IR MI