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LLVM
8.0.1
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#include "AArch64.h"#include "AArch64CallingConvention.h"#include "AArch64RegisterInfo.h"#include "AArch64Subtarget.h"#include "MCTargetDesc/AArch64AddressingModes.h"#include "Utils/AArch64BaseInfo.h"#include "llvm/ADT/APFloat.h"#include "llvm/ADT/APInt.h"#include "llvm/ADT/DenseMap.h"#include "llvm/ADT/SmallVector.h"#include "llvm/Analysis/BranchProbabilityInfo.h"#include "llvm/CodeGen/CallingConvLower.h"#include "llvm/CodeGen/FastISel.h"#include "llvm/CodeGen/FunctionLoweringInfo.h"#include "llvm/CodeGen/ISDOpcodes.h"#include "llvm/CodeGen/MachineBasicBlock.h"#include "llvm/CodeGen/MachineConstantPool.h"#include "llvm/CodeGen/MachineFrameInfo.h"#include "llvm/CodeGen/MachineInstr.h"#include "llvm/CodeGen/MachineInstrBuilder.h"#include "llvm/CodeGen/MachineMemOperand.h"#include "llvm/CodeGen/MachineRegisterInfo.h"#include "llvm/CodeGen/RuntimeLibcalls.h"#include "llvm/CodeGen/ValueTypes.h"#include "llvm/IR/Argument.h"#include "llvm/IR/Attributes.h"#include "llvm/IR/BasicBlock.h"#include "llvm/IR/CallingConv.h"#include "llvm/IR/Constant.h"#include "llvm/IR/Constants.h"#include "llvm/IR/DataLayout.h"#include "llvm/IR/DerivedTypes.h"#include "llvm/IR/Function.h"#include "llvm/IR/GetElementPtrTypeIterator.h"#include "llvm/IR/GlobalValue.h"#include "llvm/IR/InstrTypes.h"#include "llvm/IR/Instruction.h"#include "llvm/IR/Instructions.h"#include "llvm/IR/IntrinsicInst.h"#include "llvm/IR/Intrinsics.h"#include "llvm/IR/Operator.h"#include "llvm/IR/Type.h"#include "llvm/IR/User.h"#include "llvm/IR/Value.h"#include "llvm/MC/MCInstrDesc.h"#include "llvm/MC/MCRegisterInfo.h"#include "llvm/MC/MCSymbol.h"#include "llvm/Support/AtomicOrdering.h"#include "llvm/Support/Casting.h"#include "llvm/Support/CodeGen.h"#include "llvm/Support/Compiler.h"#include "llvm/Support/ErrorHandling.h"#include "llvm/Support/MachineValueType.h"#include "llvm/Support/MathExtras.h"#include <algorithm>#include <cassert>#include <cstdint>#include <iterator>#include <utility>#include "AArch64GenFastISel.inc"#include "AArch64GenCallingConv.inc"Go to the source code of this file.
Namespaces | |
| llvm | |
| This class represents lattice values for constants. | |
Functions | |
| static bool | isIntExtFree (const Instruction *I) |
| Check if the sign-/zero-extend will be a noop. More... | |
| static unsigned | getImplicitScaleFactor (MVT VT) |
| Determine the implicit scale factor that is applied by a memory operation for a given value type. More... | |
| static bool | isMulPowOf2 (const Value *I) |
| Check if the multiply is by a power-of-2 constant. More... | |
| static AArch64CC::CondCode | getCompareCC (CmpInst::Predicate Pred) |
| static bool | isZExtLoad (const MachineInstr *LI) |
| static bool | isSExtLoad (const MachineInstr *LI) |
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Definition at line 2213 of file AArch64FastISel.cpp.
References llvm::MachineInstrBuilder::addGlobalAddress(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMBB(), llvm::MachineInstrBuilder::addReg(), llvm::MachineInstrBuilder::addRegMask(), llvm::Address, llvm::MachineInstrBuilder::addSym(), llvm::AArch64ISD::ADRP, llvm::CCValAssign::AExt, llvm::AArch64CC::AL, llvm::CCState::AnalyzeCallOperands(), llvm::CCState::AnalyzeCallResult(), Arg, llvm::Function::args(), assert(), B, llvm::ARCISD::BL, llvm::ISD::BR, llvm::BuildMI(), llvm::Attribute::ByVal, llvm::CallingConv::C, Callee, llvm::ISD::Constant, llvm::constrainOperandRegClass(), emitCmp(), llvm::AArch64RegisterInfo::emitReservedArgRegCallError(), llvm::AArch64_AM::encodeLogicalImmediate(), llvm::AArch64CC::EQ, F(), llvm::MVT::f128, llvm::MVT::f16, llvm::MVT::f32, llvm::MVT::f64, llvm::CmpInst::FCMP_FALSE, llvm::CmpInst::FCMP_OEQ, llvm::CmpInst::FCMP_OGE, llvm::CmpInst::FCMP_OGT, llvm::CmpInst::FCMP_OLE, llvm::CmpInst::FCMP_OLT, llvm::CmpInst::FCMP_ONE, llvm::CmpInst::FCMP_ORD, llvm::CmpInst::FCMP_TRUE, llvm::CmpInst::FCMP_UEQ, llvm::CmpInst::FCMP_UGE, llvm::CmpInst::FCMP_UGT, llvm::CmpInst::FCMP_ULE, llvm::CmpInst::FCMP_ULT, llvm::CmpInst::FCMP_UNE, llvm::CmpInst::FCMP_UNO, llvm::CCValAssign::Full, llvm::AArch64CC::GE, llvm::MachineBasicBlock::getBasicBlock(), llvm::Function::getCallingConv(), llvm::SelectInst::getCondition(), llvm::BranchInst::getCondition(), llvm::Instruction::getDebugLoc(), llvm::SelectInst::getFalseValue(), llvm::CmpInst::getInversePredicate(), llvm::AArch64CC::getInvertedCondCode(), llvm::getKillRegState(), llvm::CCState::getNextStackOffset(), llvm::MCInstrDesc::getNumDefs(), llvm::Instruction::getOpcode(), llvm::User::getOperand(), llvm::Instruction::getParent(), llvm::AArch64Subtarget::getRegisterInfo(), llvm::Function::getReturnType(), llvm::EVT::getSimpleVT(), llvm::MVT::getSizeInBits(), llvm::MachinePointerInfo::getStack(), llvm::MVT::getStoreSize(), llvm::BranchInst::getSuccessor(), llvm::SelectInst::getTrueValue(), llvm::Value::getType(), llvm::ConstantInt::getZExtValue(), llvm::Mips::GPRIdx, llvm::AArch64CC::GT, llvm::AArch64Subtarget::hasCustomCallingConv(), llvm::AArch64Subtarget::hasFPARMv8(), llvm::AArch64Subtarget::hasNEON(), llvm::Value::hasOneUse(), llvm::AArch64CC::HI, llvm::AArch64CC::HS, I, llvm::MVT::i1, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i64, llvm::MVT::i8, llvm::CmpInst::ICMP_EQ, llvm::CmpInst::ICMP_NE, llvm::CmpInst::ICMP_SGE, llvm::CmpInst::ICMP_SGT, llvm::CmpInst::ICMP_SLE, llvm::CmpInst::ICMP_SLT, llvm::CmpInst::ICMP_UGE, llvm::CmpInst::ICMP_UGT, llvm::CmpInst::ICMP_ULE, llvm::CmpInst::ICMP_ULT, llvm::RegState::Implicit, llvm::Attribute::InReg, llvm::MVT::is128BitVector(), llvm::MVT::is64BitVector(), llvm::AArch64RegisterInfo::isAnyArgRegReserved(), llvm::Type::isArrayTy(), llvm::Type::isDoubleTy(), llvm::MVT::isFloatingPoint(), llvm::Type::isFloatTy(), llvm::Type::isIntegerTy(), llvm::AArch64Subtarget::isLittleEndian(), llvm::ConstantInt::isOne(), llvm::EVT::isSimple(), llvm::Type::isStructTy(), llvm::AArch64Subtarget::isTargetMachO(), llvm::BranchInst::isUnconditional(), llvm::CmpInst::isUnsigned(), llvm::Function::isVarArg(), llvm::MVT::isVector(), llvm::Type::isVectorTy(), llvm::MVT::isVoid, llvm::ConstantInt::isZero(), llvm::CodeModel::Large, llvm::AArch64CC::LE, llvm_unreachable, llvm::AArch64CC::LO, llvm::AArch64CC::LS, llvm::AArch64CC::LT, llvm::AArch64CC::MI, llvm::AArch64II::MO_GOT, llvm::AArch64II::MO_NC, llvm::AArch64II::MO_PAGE, llvm::AArch64II::MO_PAGEOFF, llvm::MachineMemOperand::MOStore, MRI, llvm::AArch64CC::NE, llvm::Attribute::Nest, llvm::AArch64CC::PL, llvm::SmallVectorTemplateBase< T >::push_back(), llvm::SmallVectorImpl< T >::reserve(), llvm::Intrinsic::sadd_with_overflow, llvm::CCValAssign::SExt, SI, Signed, llvm::MVT::SimpleTy, Size, llvm::SmallVectorBase::size(), llvm::Intrinsic::smul_with_overflow, llvm::Attribute::SpeculativeLoadHardening, llvm::Intrinsic::ssub_with_overflow, llvm::Attribute::StructRet, llvm::IndirectBrInst::successors(), std::swap(), llvm::CallingConv::Swift, llvm::Attribute::SwiftError, llvm::Attribute::SwiftSelf, llvm::ARMBuildAttrs::Symbol, TII, llvm::SystemZISD::TM, TRI, llvm::Intrinsic::uadd_with_overflow, llvm::Intrinsic::umul_with_overflow, UseReg(), llvm::AArch64Subtarget::useSmallAddressing(), llvm::Intrinsic::usub_with_overflow, llvm::AArch64CC::VC, llvm::AArch64CC::VS, llvm::ISD::XOR, and llvm::CCValAssign::ZExt.
Determine the implicit scale factor that is applied by a memory operation for a given value type.
Definition at line 331 of file AArch64FastISel.cpp.
References llvm::MachineInstrBuilder::addConstantPoolIndex(), llvm::MachineInstrBuilder::addGlobalAddress(), llvm::MachineInstrBuilder::addImm(), llvm::AArch64ISD::ADRP, llvm::AMDGPU::HSAMD::Kernel::Arg::Key::Align, assert(), llvm::APFloat::bitcastToAPInt(), llvm::BuildMI(), C, llvm::AArch64Subtarget::ClassifyGlobalReference(), llvm::ISD::Constant, llvm::DenseMapBase< DenseMap< KeyT, ValueT, KeyInfoT, BucketT >, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::MVT::f32, llvm::MVT::f64, llvm::AArch64_AM::getFP32Imm(), llvm::AArch64_AM::getFP64Imm(), llvm::getKillRegState(), llvm::EVT::getSimpleVT(), llvm::AllocaInst::getType(), llvm::Value::getType(), llvm::GlobalValue::getType(), llvm::ConstantFP::getValueAPF(), llvm::ConstantInt::getZExtValue(), llvm::APInt::getZExtValue(), llvm::CallingConv::GHC, llvm::MVT::i1, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i64, llvm::MVT::i8, llvm::Constant::isNullValue(), llvm::EVT::isSimple(), llvm::AArch64Subtarget::isTargetDarwin(), llvm::AArch64Subtarget::isTargetMachO(), llvm::GlobalValue::isThreadLocal(), llvm::ConstantInt::isZero(), llvm::CodeModel::Large, llvm::AArch64II::MO_GOT, llvm::AArch64II::MO_NC, llvm::AArch64II::MO_PAGE, llvm::AArch64II::MO_PAGEOFF, SI, llvm::MVT::SimpleTy, TII, llvm::SystemZISD::TM, llvm::AArch64Subtarget::useSmallAddressing(), and llvm::CallingConv::WebKit_JS.
Referenced by isMulPowOf2().
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Check if the sign-/zero-extend will be a noop.
Definition at line 311 of file AArch64FastISel.cpp.
References Arg, assert(), llvm::User::getOperand(), llvm::Value::getType(), I, llvm::Type::isIntegerTy(), and llvm::Type::isVectorTy().
Referenced by isMulPowOf2(), and isSExtLoad().
Check if the multiply is by a power-of-2 constant.
Definition at line 539 of file AArch64FastISel.cpp.
References llvm::MCID::Add, llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::MachineInstrBuilder::addReg(), llvm::Address, llvm::ISD::AND, Arg, llvm::AArch64_AM::ASR, assert(), llvm::BuildMI(), C, llvm::ISD::Constant, llvm::constrainOperandRegClass(), llvm::dyn_cast(), E, emitCmp(), llvm::AArch64_AM::encodeLogicalImmediate(), llvm::MVT::f128, llvm::MVT::f32, llvm::MVT::f64, llvm::gep_type_begin(), llvm::gep_type_end(), llvm::AArch64_AM::getArithExtendImm(), llvm::MachineInstr::getDesc(), llvm::StructLayout::getElementOffset(), llvm::MachinePointerInfo::getFixedStack(), getImplicitScaleFactor(), llvm::MVT::getIntegerVT(), llvm::getKillRegState(), llvm::MCInstrDesc::getNumDefs(), llvm::Instruction::getOpcode(), llvm::User::getOperand(), llvm::ConstantInt::getSExtValue(), llvm::AArch64_AM::getShifterImm(), llvm::EVT::getSimpleVT(), llvm::MVT::getSizeInBits(), llvm::Value::getType(), llvm::ConstantInt::getZExtValue(), llvm::Value::hasOneUse(), I, llvm::MVT::i1, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i64, llvm::MVT::i8, llvm::AArch64_AM::InvalidShiftExtend, isIntExtFree(), llvm::AArch64_AM::isLogicalImmediate(), llvm::ConstantFP::isNegative(), llvm::Constant::isNullValue(), llvm::isPowerOf2_64(), llvm::isReleaseOrStronger(), llvm::EVT::isSimple(), llvm::Type::isSized(), llvm::MVT::isVector(), llvm::Type::isVectorTy(), llvm::ConstantInt::isZero(), llvm::ConstantFP::isZero(), LLVM_FALLTHROUGH, llvm_unreachable, llvm::AArch64_AM::LSL, llvm::AArch64_AM::LSR, llvm::BitmaskEnumDetail::Mask(), llvm::max(), MI, llvm::MachineMemOperand::MOLoad, llvm::MachineMemOperand::MOStore, MRI, llvm::ISD::OR, llvm::MVT::Other, SI, llvm::MVT::SimpleTy, std::swap(), llvm::AArch64_AM::SXTB, llvm::AArch64_AM::SXTH, llvm::AArch64_AM::SXTW, llvm::AArch64_AM::SXTX, TII, llvm::Value::use_begin(), llvm::AArch64_AM::UXTB, llvm::AArch64_AM::UXTH, llvm::AArch64_AM::UXTW, and llvm::ISD::XOR.
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Definition at line 4445 of file AArch64FastISel.cpp.
References llvm::MCID::Add, llvm::ISD::ADD, llvm::MachineInstrBuilder::addDef(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::MachineInstrBuilder::addUse(), Arg, llvm::AMDGPU::HSAMD::Kernel::Key::Args, llvm::AArch64_AM::ASR, assert(), llvm::EVT::bitsGT(), llvm::EVT::bitsLT(), llvm::BuildMI(), C, llvm::ISD::Constant, llvm::constrainOperandRegClass(), llvm::APInt::countTrailingZeros(), llvm::dyn_cast(), E, llvm::MVT::f32, llvm::MVT::f64, llvm::tgtok::Field, llvm::ISD::FP_TO_SINT, llvm::gep_type_begin(), llvm::gep_type_end(), llvm::AtomicCmpXchgInst::getCompareOperand(), llvm::EVT::getEVT(), llvm::getKillRegState(), llvm::AtomicCmpXchgInst::getNewValOperand(), llvm::MCInstrDesc::getNumDefs(), llvm::User::getNumOperands(), llvm::Instruction::getOpcode(), llvm::MachineInstr::getOpcode(), llvm::User::getOperand(), llvm::MachineInstr::getOperand(), llvm::AtomicCmpXchgInst::getPointerOperand(), llvm::MachineOperand::getReg(), llvm::EVT::getSimpleVT(), llvm::MachineOperand::getSubReg(), llvm::Value::getType(), I, llvm::MVT::i32, llvm::MVT::i64, isIntExtFree(), llvm::APInt::isNegative(), llvm::APInt::isPowerOf2(), llvm::EVT::isSimple(), llvm::MVT::isVector(), llvm::ConstantInt::isZero(), isZExtLoad(), llvm_unreachable, llvm::SPII::Load, llvm::AArch64CC::LT, MI, MRI, llvm::ISD::MUL, N, llvm::AArch64CC::NE, llvm::CodeGenOpt::None, llvm::User::operands(), llvm::MipsISD::Ret, llvm::ISD::SDIV, llvm::MCID::Select, selectBinaryOp(), llvm::FastISel::selectBitCast(), llvm::MVT::SimpleTy, llvm::ISD::SINT_TO_FP, llvm::ISD::SREM, llvm::SPII::Store, std::swap(), TII, llvm::SystemZISD::TM, llvm::ISD::TRUNCATE, llvm::ISD::UREM, and UseReg().
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Definition at line 4425 of file AArch64FastISel.cpp.
References llvm::MachineInstr::getOpcode().
Referenced by isSExtLoad().
1.8.13