16 #ifndef LLVM_CODEGEN_LATENCYPRIORITYQUEUE_H 17 #define LLVM_CODEGEN_LATENCYPRIORITYQUEUE_H 20 #include "llvm/Config/llvm-config.h" 23 class LatencyPriorityQueue;
35 std::vector<SUnit> *SUnits;
41 std::vector<unsigned> NumNodesSolelyBlocking;
44 std::vector<SUnit*> Queue;
53 void initNodes(std::vector<SUnit> &sunits)
override {
55 NumNodesSolelyBlocking.resize(SUnits->size(), 0);
59 NumNodesSolelyBlocking.resize(SUnits->size(), 0);
70 assert(NodeNum < (*SUnits).size());
71 return (*SUnits)[NodeNum].getHeight();
75 assert(NodeNum < NumNodesSolelyBlocking.size());
76 return NumNodesSolelyBlocking[NodeNum];
79 bool empty()
const override {
return Queue.empty(); }
81 void push(
SUnit *U)
override;
83 SUnit *pop()
override;
85 void remove(
SUnit *SU)
override;
87 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 95 void scheduledNode(
SUnit *SU)
override;
98 void AdjustPriorityOfUnscheduledPreds(
SUnit *SU);
This class represents lattice values for constants.
void releaseState() override
This interface is used to plug different priorities computation algorithms into the list scheduler...
bool operator()(const SUnit *LHS, const SUnit *RHS) const
void dump(const SparseBitVector< ElementSize > &LHS, raw_ostream &out)
unsigned getLatency(unsigned NodeNum) const
latency_sort(LatencyPriorityQueue *pq)
Sorting functions for the Available queue.
LatencyPriorityQueue * PQ
unsigned getNumSolelyBlockNodes(unsigned NodeNum) const
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void addNode(const SUnit *SU) override
bool empty() const override
void initNodes(std::vector< SUnit > &sunits) override
bool isBottomUp() const override
Scheduling unit. This is a node in the scheduling DAG.
void updateNode(const SUnit *SU) override