LLVM  8.0.1
MipsLegalizerInfo.cpp
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1 //===- MipsLegalizerInfo.cpp ------------------------------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 /// \file
10 /// This file implements the targeting of the Machinelegalizer class for Mips.
11 /// \todo This should be generated by TableGen.
12 //===----------------------------------------------------------------------===//
13 
14 #include "MipsLegalizerInfo.h"
15 #include "MipsTargetMachine.h"
17 
18 using namespace llvm;
19 
21  using namespace TargetOpcode;
22 
23  const LLT s1 = LLT::scalar(1);
24  const LLT s32 = LLT::scalar(32);
25  const LLT s64 = LLT::scalar(64);
26  const LLT p0 = LLT::pointer(0, 32);
27 
29  .legalFor({s32})
30  .clampScalar(0, s32, s32);
31 
33  .lowerFor({{s32, s1}});
34 
35  getActionDefinitionsBuilder({G_LOAD, G_STORE})
36  .legalForCartesianProduct({p0, s32}, {p0});
37 
39  .legalForCartesianProduct({p0, s32}, {s32})
40  .minScalar(0, s32)
41  .minScalar(1, s32);
42 
43  getActionDefinitionsBuilder({G_AND, G_OR, G_XOR})
44  .legalFor({s32})
45  .clampScalar(0, s32, s32);
46 
47  getActionDefinitionsBuilder({G_SHL, G_ASHR, G_LSHR})
48  .legalFor({s32});
49 
50  getActionDefinitionsBuilder({G_SDIV, G_SREM, G_UREM, G_UDIV})
51  .legalFor({s32})
52  .minScalar(0, s32)
53  .libcallFor({s64});
54 
56  .legalFor({{s32, s32}})
57  .minScalar(0, s32);
58 
59  getActionDefinitionsBuilder(G_CONSTANT)
60  .legalFor({s32})
61  .clampScalar(0, s32, s32);
62 
64  .legalFor({{p0, s32}});
65 
66  getActionDefinitionsBuilder(G_FRAME_INDEX)
67  .legalFor({p0});
68 
69  getActionDefinitionsBuilder(G_GLOBAL_VALUE)
70  .legalFor({p0});
71 
72  computeTables();
73  verify(*ST.getInstrInfo());
74 }
75 
78  MachineIRBuilder &MIRBuilder,
79  GISelChangeObserver &Observer) const {
80 
81  using namespace TargetOpcode;
82 
83  MIRBuilder.setInstr(MI);
84 
85  return false;
86 }
This class represents lattice values for constants.
Definition: AllocatorList.h:24
MipsLegalizerInfo(const MipsSubtarget &ST)
const MipsInstrInfo * getInstrInfo() const override
This file declares the targeting of the Machinelegalizer class for Mips.
LegalizeRuleSet & legalForCartesianProduct(std::initializer_list< LLT > Types)
The instruction is legal when type indexes 0 and 1 are both in the given list.
void verify(const MCInstrInfo &MII) const
Perform simple self-diagnostic and assert if there is anything obviously wrong with the actions set u...
void computeTables()
Compute any ancillary tables needed to quickly decide how an operation should be handled.
static LLT scalar(unsigned SizeInBits)
Get a low-level scalar or aggregate "bag of bits".
Abstract class that contains various methods for clients to notify about changes. ...
unsigned const MachineRegisterInfo * MRI
LegalizeRuleSet & lowerFor(std::initializer_list< LLT > Types)
The instruction is lowered when type index 0 is any type in the given list.
LegalizeRuleSet & libcallFor(std::initializer_list< LLT > Types)
Helper class to build MachineInstr.
void setInstr(MachineInstr &MI)
Set the insertion point to before MI.
LegalizeRuleSet & minScalar(unsigned TypeIdx, const LLT &Ty)
Ensure the scalar is at least as wide as Ty.
LegalizeRuleSet & getActionDefinitionsBuilder(unsigned Opcode)
Get the action definition builder for the given opcode.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
LegalizeRuleSet & legalFor(std::initializer_list< LLT > Types)
The instruction is legal when type index 0 is any type in the given list.
Representation of each machine instruction.
Definition: MachineInstr.h:64
bool legalizeCustom(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, GISelChangeObserver &Observer) const override
static LLT pointer(uint16_t AddressSpace, unsigned SizeInBits)
Get a low-level pointer in the given address space (defaulting to 0).
IRTranslator LLVM IR MI