LLVM
8.0.1
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#include "Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.h"
Additional Inherited Members | |
Protected Member Functions inherited from llvm::MCCodeEmitter | |
MCCodeEmitter () | |
Definition at line 26 of file PPCMCCodeEmitter.h.
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inline |
Definition at line 32 of file PPCMCCodeEmitter.h.
References encodeInstruction(), get_crbitm_encoding(), getAbsCondBrEncoding(), getAbsDirectBrEncoding(), getBinaryCodeForInstr(), getCondBrEncoding(), getDirectBrEncoding(), getImm16Encoding(), getInstSizeInBytes(), getMachineOpValue(), getMemRIEncoding(), getMemRIX16Encoding(), getMemRIXEncoding(), getSPE2DisEncoding(), getSPE4DisEncoding(), getSPE8DisEncoding(), getTLSCallEncoding(), getTLSRegEncoding(), MI, operator=(), and ~PPCMCCodeEmitter().
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delete |
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overridedefault |
Referenced by PPCMCCodeEmitter().
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overridevirtual |
EncodeInstruction - Encode the given Inst
to bytes on the output stream OS
.
Implements llvm::MCCodeEmitter.
Definition at line 283 of file PPCMCCodeEmitter.cpp.
References llvm::support::big, llvm::tgtok::Bits, E, getBinaryCodeForInstr(), llvm::MCSubtargetInfo::getFeatureBits(), getInstSizeInBytes(), llvm::support::little, llvm_unreachable, and Size.
Referenced by PPCMCCodeEmitter().
unsigned PPCMCCodeEmitter::get_crbitm_encoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 237 of file PPCMCCodeEmitter.cpp.
References assert(), llvm::MCRegisterInfo::getEncodingValue(), llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), llvm::MCOperand::getReg(), llvm::MCContext::getRegisterInfo(), and llvm::PPCISD::MFOCRF.
Referenced by getTLSCallEncoding(), and PPCMCCodeEmitter().
unsigned PPCMCCodeEmitter::getAbsCondBrEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 82 of file PPCMCCodeEmitter.cpp.
References llvm::MCFixup::create(), llvm::PPC::fixup_ppc_brcond14abs, llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCInst::getOperand(), llvm::MCOperand::isImm(), llvm::MCOperand::isReg(), and llvm::SmallVectorTemplateBase< T >::push_back().
Referenced by getAbsDirectBrEncoding(), and PPCMCCodeEmitter().
unsigned PPCMCCodeEmitter::getAbsDirectBrEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 69 of file PPCMCCodeEmitter.cpp.
References llvm::MCFixup::create(), llvm::PPC::fixup_ppc_br24abs, getAbsCondBrEncoding(), llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCInst::getOperand(), llvm::MCOperand::isImm(), llvm::MCOperand::isReg(), and llvm::SmallVectorTemplateBase< T >::push_back().
Referenced by getCondBrEncoding(), and PPCMCCodeEmitter().
uint64_t llvm::PPCMCCodeEmitter::getBinaryCodeForInstr | ( | const MCInst & | MI, |
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Referenced by encodeInstruction(), and PPCMCCodeEmitter().
unsigned PPCMCCodeEmitter::getCondBrEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 56 of file PPCMCCodeEmitter.cpp.
References llvm::MCFixup::create(), llvm::PPC::fixup_ppc_brcond14, getAbsDirectBrEncoding(), llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCInst::getOperand(), llvm::MCOperand::isImm(), llvm::MCOperand::isReg(), and llvm::SmallVectorTemplateBase< T >::push_back().
Referenced by PPCMCCodeEmitter().
unsigned PPCMCCodeEmitter::getDirectBrEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 44 of file PPCMCCodeEmitter.cpp.
References llvm::MCFixup::create(), llvm::PPC::fixup_ppc_br24, llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCInst::getOperand(), llvm::MCOperand::isImm(), llvm::MCOperand::isReg(), and llvm::SmallVectorTemplateBase< T >::push_back().
Referenced by llvm::createPPCMCCodeEmitter(), getTLSCallEncoding(), and PPCMCCodeEmitter().
unsigned PPCMCCodeEmitter::getImm16Encoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 94 of file PPCMCCodeEmitter.cpp.
References llvm::MCFixup::create(), llvm::PPC::fixup_ppc_half16, llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCInst::getOperand(), llvm::MCOperand::isImm(), llvm::MCOperand::isReg(), and llvm::SmallVectorTemplateBase< T >::push_back().
Referenced by PPCMCCodeEmitter().
Definition at line 314 of file PPCMCCodeEmitter.cpp.
References llvm::MCInstrInfo::get(), llvm::MCInst::getOpcode(), and llvm::MCInstrDesc::getSize().
Referenced by encodeInstruction(), and PPCMCCodeEmitter().
unsigned PPCMCCodeEmitter::getMachineOpValue | ( | const MCInst & | MI, |
const MCOperand & | MO, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
getMachineOpValue - Return binary encoding of operand.
If the machine operand requires relocation, record the relocation and return zero.
Definition at line 262 of file PPCMCCodeEmitter.cpp.
References assert(), llvm::MCInstrInfo::get(), llvm::MCRegisterInfo::getEncodingValue(), llvm::MCOperand::getImm(), llvm::MCInst::getOpcode(), getOpIdxForMO(), llvm::MCOperand::getReg(), llvm::MCContext::getRegisterInfo(), llvm::PPCInstrInfo::getRegNumForOperand(), llvm::MCOperand::isImm(), llvm::MCOperand::isReg(), llvm::PPCISD::MFOCRF, and Reg.
Referenced by getAbsCondBrEncoding(), getAbsDirectBrEncoding(), getCondBrEncoding(), getDirectBrEncoding(), getImm16Encoding(), getMemRIEncoding(), getMemRIX16Encoding(), getMemRIXEncoding(), getOpIdxForMO(), getSPE2DisEncoding(), getSPE4DisEncoding(), getSPE8DisEncoding(), getTLSRegEncoding(), and PPCMCCodeEmitter().
unsigned PPCMCCodeEmitter::getMemRIEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 106 of file PPCMCCodeEmitter.cpp.
References assert(), llvm::MCFixup::create(), llvm::PPC::fixup_ppc_half16, getMachineOpValue(), llvm::MCInst::getOperand(), llvm::MCOperand::isReg(), and llvm::SmallVectorTemplateBase< T >::push_back().
Referenced by PPCMCCodeEmitter().
unsigned PPCMCCodeEmitter::getMemRIX16Encoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 142 of file PPCMCCodeEmitter.cpp.
References assert(), llvm::MCFixup::create(), llvm::PPC::fixup_ppc_half16ds, getMachineOpValue(), llvm::MCInst::getOperand(), llvm::MCOperand::isReg(), and llvm::SmallVectorTemplateBase< T >::push_back().
Referenced by PPCMCCodeEmitter().
unsigned PPCMCCodeEmitter::getMemRIXEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 124 of file PPCMCCodeEmitter.cpp.
References assert(), llvm::MCFixup::create(), llvm::PPC::fixup_ppc_half16ds, getMachineOpValue(), llvm::MCInst::getOperand(), llvm::MCOperand::isReg(), and llvm::SmallVectorTemplateBase< T >::push_back().
Referenced by PPCMCCodeEmitter().
unsigned PPCMCCodeEmitter::getSPE2DisEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 193 of file PPCMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), llvm::MCInst::getOperand(), llvm::MCOperand::isReg(), and llvm::reverseBits().
Referenced by PPCMCCodeEmitter().
unsigned PPCMCCodeEmitter::getSPE4DisEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 178 of file PPCMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), llvm::MCInst::getOperand(), llvm::MCOperand::isReg(), and llvm::reverseBits().
Referenced by PPCMCCodeEmitter().
unsigned PPCMCCodeEmitter::getSPE8DisEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 163 of file PPCMCCodeEmitter.cpp.
References assert(), getMachineOpValue(), llvm::MCInst::getOperand(), llvm::MCOperand::isReg(), and llvm::reverseBits().
Referenced by PPCMCCodeEmitter().
unsigned PPCMCCodeEmitter::getTLSCallEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 224 of file PPCMCCodeEmitter.cpp.
References llvm::MCFixup::create(), llvm::PPC::fixup_ppc_nofixup, get_crbitm_encoding(), getDirectBrEncoding(), llvm::MCOperand::getExpr(), llvm::MCInst::getOperand(), and llvm::SmallVectorTemplateBase< T >::push_back().
Referenced by PPCMCCodeEmitter().
unsigned PPCMCCodeEmitter::getTLSRegEncoding | ( | const MCInst & | MI, |
unsigned | OpNo, | ||
SmallVectorImpl< MCFixup > & | Fixups, | ||
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 208 of file PPCMCCodeEmitter.cpp.
References llvm::MCFixup::create(), llvm::PPC::fixup_ppc_nofixup, llvm::Triple::getArch(), llvm::MCRegisterInfo::getEncodingValue(), llvm::MCOperand::getExpr(), getMachineOpValue(), llvm::MCInst::getOperand(), llvm::MCContext::getRegisterInfo(), llvm::MCSubtargetInfo::getTargetTriple(), llvm::MCOperand::isReg(), llvm::Triple::ppc64, llvm::Triple::ppc64le, llvm::SmallVectorTemplateBase< T >::push_back(), and R2.
Referenced by PPCMCCodeEmitter().
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delete |
Referenced by PPCMCCodeEmitter().