LLVM
8.0.1
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#include "Target/Hexagon/HexagonHazardRecognizer.h"
Public Member Functions | |
HexagonHazardRecognizer (const InstrItineraryData *II, const HexagonInstrInfo *HII, const HexagonSubtarget &ST) | |
~HexagonHazardRecognizer () override | |
void | Reset () override |
This callback is invoked when a new block of instructions is about to be scheduled. More... | |
HazardType | getHazardType (SUnit *SU, int stalls) override |
Return the hazard type of emitting this node. More... | |
void | EmitInstruction (SUnit *) override |
This callback is invoked when an instruction is emitted to be scheduled, to advance the hazard state. More... | |
bool | ShouldPreferAnother (SUnit *) override |
This callback may be invoked if getHazardType returns NoHazard. More... | |
void | AdvanceCycle () override |
This callback is invoked whenever the next top-down instruction to be scheduled cannot issue in the current cycle, either because of latency or resource conflicts. More... | |
Public Member Functions inherited from llvm::ScheduleHazardRecognizer | |
ScheduleHazardRecognizer ()=default | |
virtual | ~ScheduleHazardRecognizer () |
unsigned | getMaxLookAhead () const |
bool | isEnabled () const |
virtual bool | atIssueLimit () const |
atIssueLimit - Return true if no more instructions may be issued in this cycle. More... | |
virtual void | EmitInstruction (MachineInstr *) |
This overload will be used when the hazard recognizer is being used by a non-scheduling pass, which does not use SUnits. More... | |
virtual unsigned | PreEmitNoops (SUnit *) |
PreEmitNoops - This callback is invoked prior to emitting an instruction. More... | |
virtual unsigned | PreEmitNoops (MachineInstr *) |
This overload will be used when the hazard recognizer is being used by a non-scheduling pass, which does not use SUnits. More... | |
virtual void | RecedeCycle () |
RecedeCycle - This callback is invoked whenever the next bottom-up instruction to be scheduled cannot issue in the current cycle, either because of latency or resource conflicts. More... | |
virtual void | EmitNoop () |
EmitNoop - This callback is invoked when a noop was added to the instruction stream. More... | |
Additional Inherited Members | |
Public Types inherited from llvm::ScheduleHazardRecognizer | |
enum | HazardType { NoHazard, Hazard, NoopHazard } |
Protected Attributes inherited from llvm::ScheduleHazardRecognizer | |
unsigned | MaxLookAhead = 0 |
MaxLookAhead - Indicate the number of cycles in the scoreboard state. More... | |
Definition at line 23 of file HexagonHazardRecognizer.h.
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inline |
Definition at line 45 of file HexagonHazardRecognizer.h.
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inlineoverride |
Definition at line 50 of file HexagonHazardRecognizer.h.
References AdvanceCycle(), EmitInstruction(), getHazardType(), Reset(), and ShouldPreferAnother().
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overridevirtual |
This callback is invoked whenever the next top-down instruction to be scheduled cannot issue in the current cycle, either because of latency or resource conflicts.
This should increment the internal state of the hazard recognizer so that previously "Hazard" instructions will now not be hazards.
Reimplemented from llvm::ScheduleHazardRecognizer.
Definition at line 78 of file HexagonHazardRecognizer.cpp.
References llvm::SmallSet< T, N, C >::clear(), llvm::DFAPacketizer::clearResources(), llvm::dbgs(), and LLVM_DEBUG.
Referenced by ~HexagonHazardRecognizer().
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overridevirtual |
This callback is invoked when an instruction is emitted to be scheduled, to advance the hazard state.
Reimplemented from llvm::ScheduleHazardRecognizer.
Definition at line 109 of file HexagonHazardRecognizer.cpp.
References assert(), llvm::DFAPacketizer::canReserveResources(), llvm::dbgs(), llvm::MachineInstr::getDebugLoc(), llvm::HexagonInstrInfo::getDotNewOp(), llvm::SUnit::getInstr(), llvm::MachineInstr::getOpcode(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), llvm::SmallSet< T, N, C >::insert(), llvm::HexagonInstrInfo::isHVXVec(), LLVM_DEBUG, llvm::HexagonInstrInfo::mayBeCurLoad(), llvm::HexagonInstrInfo::mayBeNewStore(), llvm::MachineInstr::mayLoad(), llvm::MachineInstr::mayStore(), MI, llvm::MachineInstr::operands(), llvm::DFAPacketizer::reserveResources(), and llvm::SUnit::Succs.
Referenced by ~HexagonHazardRecognizer().
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overridevirtual |
Return the hazard type of emitting this node.
There are three possible results. Either:
Reimplemented from llvm::ScheduleHazardRecognizer.
Definition at line 40 of file HexagonHazardRecognizer.cpp.
References llvm::DFAPacketizer::canReserveResources(), llvm::SmallSet< T, N, C >::count(), llvm::MachineFunction::CreateMachineInstr(), llvm::dbgs(), llvm::MachineFunction::DeleteMachineInstr(), llvm::MachineInstr::getDebugLoc(), llvm::HexagonInstrInfo::getDotNewOp(), llvm::SUnit::getInstr(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getReg(), llvm::ScheduleHazardRecognizer::Hazard, llvm::MachineOperand::isReg(), LLVM_DEBUG, llvm::HexagonInstrInfo::mayBeNewStore(), MI, and llvm::ScheduleHazardRecognizer::NoHazard.
Referenced by ~HexagonHazardRecognizer().
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overridevirtual |
This callback is invoked when a new block of instructions is about to be scheduled.
The hazard state is set to an initialized state.
Reimplemented from llvm::ScheduleHazardRecognizer.
Definition at line 28 of file HexagonHazardRecognizer.cpp.
References llvm::SmallSet< T, N, C >::clear(), llvm::DFAPacketizer::clearResources(), llvm::dbgs(), and LLVM_DEBUG.
Referenced by ~HexagonHazardRecognizer().
This callback may be invoked if getHazardType returns NoHazard.
Handle the cases when we prefer one instruction over another.
If, even though there is no hazard, it would be better to schedule another available instruction, this callback should return true.
Case 1 - we prefer not to generate multiple loads in the packet to avoid a potential bank conflict. Case 2 - if a packet contains a dot cur instruction, then we prefer the instruction that can use the dot cur result. However, if the use is not scheduled in the same packet, then prefer other instructions in the subsequent packet. Case 3 - we prefer a vector store that can be converted to a .new store. The packetizer will not generate the .new store if the store doesn't have resources to fit in the packet (but the .new store may have resources). We attempt to schedule the store as soon as possible to help packetize the two instructions together.
Reimplemented from llvm::ScheduleHazardRecognizer.
Definition at line 101 of file HexagonHazardRecognizer.cpp.
References llvm::SUnit::getInstr(), llvm::SUnit::isInstr(), and llvm::MachineInstr::mayLoad().
Referenced by ~HexagonHazardRecognizer().