Specify the latency in cpu cycles for a particular scheduling class and def index. More...

#include "llvm/MC/MCSchedule.h"

Collaboration diagram for llvm::MCWriteLatencyEntry:

Public Member Functions
bool	operator== (const MCWriteLatencyEntry &Other) const

Public Attributes
int16_t	Cycles

uint16_t	WriteResourceID

Detailed Description

Specify the latency in cpu cycles for a particular scheduling class and def index.

-1 indicates an invalid latency. Heuristics would typically consider an instruction with invalid latency to have infinite latency. Also identify the WriteResources of this def. When the operand expands to a sequence of writes, this ID is the last write in the sequence.

Definition at line 78 of file MCSchedule.h.

Member Function Documentation

◆ operator==()

bool llvm::MCWriteLatencyEntry::operator== ( const MCWriteLatencyEntry & Other ) const

inline

Definition at line 82 of file MCSchedule.h.

References Cycles, and WriteResourceID.

Member Data Documentation

◆ Cycles

int16_t llvm::MCWriteLatencyEntry::Cycles

Definition at line 79 of file MCSchedule.h.

Referenced by llvm::MCSchedModel::computeInstrLatency(), llvm::TargetSchedModel::computeOperandLatency(), getLatency(), operator==(), and llvm::mca::verifyOperands().

◆ WriteResourceID

uint16_t llvm::MCWriteLatencyEntry::WriteResourceID

Definition at line 80 of file MCSchedule.h.

Referenced by llvm::TargetSchedModel::computeOperandLatency(), operator==(), and llvm::mca::verifyOperands().

The documentation for this struct was generated from the following file:

include/llvm/MC/MCSchedule.h