Specify the cost of a register definition in terms of number of physical register allocated at register renaming stage. More...
#include "llvm/MC/MCSchedule.h"
Public Attributes | |
| unsigned | RegisterClassID |
| unsigned | Cost |
| bool | AllowMoveElimination |
Detailed Description
Specify the cost of a register definition in terms of number of physical register allocated at register renaming stage.
For example, AMD Jaguar. natively supports 128-bit data types, and operations on 256-bit registers (i.e. YMM registers) are internally split into two COPs (complex operations) and each COP updates a physical register. Basically, on Jaguar, a YMM register write effectively consumes two physical registers. That means, the cost of a YMM write in the BtVer2 model is 2.
Definition at line 142 of file MCSchedule.h.
Member Data Documentation
◆ AllowMoveElimination
| bool llvm::MCRegisterCostEntry::AllowMoveElimination |
Definition at line 145 of file MCSchedule.h.
◆ Cost
| unsigned llvm::MCRegisterCostEntry::Cost |
Definition at line 144 of file MCSchedule.h.
◆ RegisterClassID
| unsigned llvm::MCRegisterCostEntry::RegisterClassID |
Definition at line 143 of file MCSchedule.h.
The documentation for this struct was generated from the following file:
- include/llvm/MC/MCSchedule.h
