PPCHazardRecognizer970 - This class defines a finite state automata that models the dispatch logic on the PowerPC 970 (aka G5) processor. More...
#include "Target/PowerPC/PPCHazardRecognizers.h"
Public Member Functions | |
| PPCHazardRecognizer970 (const ScheduleDAG &DAG) | |
| HazardType | getHazardType (SUnit *SU, int Stalls) override |
| getHazardType - We return hazard for any non-branch instruction that would terminate the dispatch group. More... | |
| void | EmitInstruction (SUnit *SU) override |
| EmitInstruction - This callback is invoked when an instruction is emitted, to advance the hazard state. More... | |
| void | AdvanceCycle () override |
| AdvanceCycle - This callback is invoked whenever the next top-down instruction to be scheduled cannot issue in the current cycle, either because of latency or resource conflicts. More... | |
| void | Reset () override |
| Reset - This callback is invoked when a new block of instructions is about to be schedule. More... | |
 Public Member Functions inherited from llvm::ScheduleHazardRecognizer | |
| ScheduleHazardRecognizer ()=default | |
| virtual | ~ScheduleHazardRecognizer () |
| unsigned | getMaxLookAhead () const |
| bool | isEnabled () const |
| virtual bool | atIssueLimit () const |
| atIssueLimit - Return true if no more instructions may be issued in this cycle. More... | |
| virtual void | EmitInstruction (MachineInstr *) |
| This overload will be used when the hazard recognizer is being used by a non-scheduling pass, which does not use SUnits. More... | |
| virtual unsigned | PreEmitNoops (SUnit *) |
| PreEmitNoops - This callback is invoked prior to emitting an instruction. More... | |
| virtual unsigned | PreEmitNoops (MachineInstr *) |
| This overload will be used when the hazard recognizer is being used by a non-scheduling pass, which does not use SUnits. More... | |
| virtual bool | ShouldPreferAnother (SUnit *) |
| ShouldPreferAnother - This callback may be invoked if getHazardType returns NoHazard. More... | |
| virtual void | RecedeCycle () |
| RecedeCycle - This callback is invoked whenever the next bottom-up instruction to be scheduled cannot issue in the current cycle, either because of latency or resource conflicts. More... | |
| virtual void | EmitNoop () |
| EmitNoop - This callback is invoked when a noop was added to the instruction stream. More... | |
Additional Inherited Members | |
| Public Types inherited from llvm::ScheduleHazardRecognizer | |
| enum | HazardType { NoHazard, Hazard, NoopHazard } |
| Protected Attributes inherited from llvm::ScheduleHazardRecognizer | |
| unsigned | MaxLookAhead = 0 |
| MaxLookAhead - Indicate the number of cycles in the scoreboard state. More... | |
Detailed Description
PPCHazardRecognizer970 - This class defines a finite state automata that models the dispatch logic on the PowerPC 970 (aka G5) processor.
This promotes good dispatch group formation and implements noop insertion to avoid structural hazards that cause significant performance penalties (e.g. setting the CTR register then branching through it within a dispatch group), or storing then loading from the same address within a dispatch group.
Definition at line 56 of file PPCHazardRecognizers.h.
Constructor & Destructor Documentation
◆ PPCHazardRecognizer970()
| PPCHazardRecognizer970::PPCHazardRecognizer970 | ( | const ScheduleDAG & | DAG | ) |
Definition at line 264 of file PPCHazardRecognizers.cpp.
References llvm::errs(), llvm::MCInstrInfo::get(), getHazardType(), isLoad(), isStore(), LLVM_DEBUG, llvm::MCInstrDesc::mayLoad(), llvm::MCInstrDesc::mayStore(), llvm::PPCII::PPC970_Cracked, llvm::PPCII::PPC970_First, llvm::PPCII::PPC970_Mask, llvm::PPCII::PPC970_Single, llvm::ScheduleDAG::TII, and llvm::MCInstrDesc::TSFlags.
Member Function Documentation
◆ AdvanceCycle()
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overridevirtual |
AdvanceCycle - This callback is invoked whenever the next top-down instruction to be scheduled cannot issue in the current cycle, either because of latency or resource conflicts.
This should increment the internal state of the hazard recognizer so that previously "Hazard" instructions will now not be hazards.
Reimplemented from llvm::ScheduleHazardRecognizer.
Definition at line 425 of file PPCHazardRecognizers.cpp.
References assert().
◆ EmitInstruction()
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overridevirtual |
EmitInstruction - This callback is invoked when an instruction is emitted, to advance the hazard state.
Reimplemented from llvm::ScheduleHazardRecognizer.
Definition at line 387 of file PPCHazardRecognizers.cpp.
References llvm::SUnit::getInstr(), llvm::MachineMemOperand::getOffset(), llvm::MachineInstr::getOpcode(), llvm::MachineMemOperand::getSize(), llvm::MachineMemOperand::getValue(), llvm::MachineInstr::isDebugInstr(), isLoad(), isStore(), llvm::MachineInstr::memoperands_begin(), MI, llvm::PPCISD::MTCTR, llvm::PPCII::PPC970_BRU, and llvm::PPCII::PPC970_Pseudo.
◆ getHazardType()
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overridevirtual |
getHazardType - We return hazard for any non-branch instruction that would terminate the dispatch group.
We turn NoopHazard for any instructions that wouldn't terminate the dispatch group that would cause a pipeline flush.
Reimplemented from llvm::ScheduleHazardRecognizer.
Definition at line 327 of file PPCHazardRecognizers.cpp.
References assert(), llvm::PPCISD::BCTRL, llvm::SUnit::getInstr(), llvm::MachineMemOperand::getOffset(), llvm::MachineInstr::getOpcode(), llvm::MachineMemOperand::getSize(), llvm::MachineMemOperand::getValue(), llvm::ScheduleHazardRecognizer::Hazard, llvm::MachineInstr::isDebugInstr(), isLoad(), isStore(), llvm_unreachable, llvm::MachineInstr::memoperands_begin(), llvm::MachineInstr::memoperands_empty(), MI, llvm::ScheduleHazardRecognizer::NoHazard, llvm::ScheduleHazardRecognizer::NoopHazard, llvm::PPCII::PPC970_BRU, llvm::PPCII::PPC970_CRU, llvm::PPCII::PPC970_FPU, llvm::PPCII::PPC970_FXU, llvm::PPCII::PPC970_LSU, llvm::PPCII::PPC970_Pseudo, llvm::PPCII::PPC970_VALU, and llvm::PPCII::PPC970_VPERM.
Referenced by PPCHazardRecognizer970().
◆ Reset()
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overridevirtual |
Reset - This callback is invoked when a new block of instructions is about to be schedule.
The hazard state should be set to an initialized state.
Reimplemented from llvm::ScheduleHazardRecognizer.
Definition at line 432 of file PPCHazardRecognizers.cpp.
The documentation for this class was generated from the following files:
- lib/Target/PowerPC/PPCHazardRecognizers.h
- lib/Target/PowerPC/PPCHazardRecognizers.cpp
