LLVM  8.0.1
llvm::AArch64RegisterBankInfo Member List

This is the complete list of members for llvm::AArch64RegisterBankInfo, including all inherited members.

AArch64RegisterBankInfo(const TargetRegisterInfo &TRI)llvm::AArch64RegisterBankInfo
applyDefaultMapping(const OperandsMapper &OpdMapper)llvm::RegisterBankInfostatic
BankIDToCopyMapIdxllvm::AArch64GenRegisterBankInfoprotectedstatic
checkPartialMap(unsigned Idx, unsigned ValStartIdx, unsigned ValLength, const RegisterBank &RB)llvm::AArch64GenRegisterBankInfoprotectedstatic
checkPartialMappingIdx(PartialMappingIdx FirstAlias, PartialMappingIdx LastAlias, ArrayRef< PartialMappingIdx > Order)llvm::AArch64GenRegisterBankInfoprotectedstatic
checkValueMapImpl(unsigned Idx, unsigned FirstInBank, unsigned Size, unsigned Offset)llvm::AArch64GenRegisterBankInfoprotectedstatic
constrainGenericRegister(unsigned Reg, const TargetRegisterClass &RC, MachineRegisterInfo &MRI)llvm::RegisterBankInfostatic
copyCost(const RegisterBank &A, const RegisterBank &B, unsigned Size) const overridellvm::AArch64RegisterBankInfovirtual
DefaultMappingIDllvm::RegisterBankInfostatic
DistanceBetweenCrossRegCpy enum valuellvm::AArch64GenRegisterBankInfoprotected
DistanceBetweenRegBanks enum valuellvm::AArch64GenRegisterBankInfoprotected
First3OpsIdx enum valuellvm::AArch64GenRegisterBankInfoprotected
FirstCrossRegCpyIdx enum valuellvm::AArch64GenRegisterBankInfoprotected
FPExt16To32Idx enum valuellvm::AArch64GenRegisterBankInfoprotected
FPExt16To64Idx enum valuellvm::AArch64GenRegisterBankInfoprotected
FPExt32To64Idx enum valuellvm::AArch64GenRegisterBankInfoprotected
FPExt64To128Idx enum valuellvm::AArch64GenRegisterBankInfoprotected
getCopyMapping(unsigned DstBankID, unsigned SrcBankID, unsigned Size)llvm::AArch64GenRegisterBankInfoprotectedstatic
getFPExtMapping(unsigned DstSize, unsigned SrcSize)llvm::AArch64GenRegisterBankInfoprotectedstatic
getInstrAlternativeMappings(const MachineInstr &MI) const overridellvm::AArch64RegisterBankInfovirtual
getInstrMapping(const MachineInstr &MI) const overridellvm::AArch64RegisterBankInfovirtual
getInstrMappingImpl(const MachineInstr &MI) constllvm::RegisterBankInfoprotected
getInstructionMapping(unsigned ID, unsigned Cost, const ValueMapping *OperandsMapping, unsigned NumOperands) constllvm::RegisterBankInfoinline
getInvalidInstructionMapping() constllvm::RegisterBankInfoinline
getMinimalPhysRegClass(unsigned Reg, const TargetRegisterInfo &TRI) constllvm::RegisterBankInfoprotected
getNumRegBanks() constllvm::RegisterBankInfoinline
getOperandsMapping(Iterator Begin, Iterator End) constllvm::RegisterBankInfoprotected
getOperandsMapping(const SmallVectorImpl< const ValueMapping *> &OpdsMapping) constllvm::RegisterBankInfoprotected
getOperandsMapping(std::initializer_list< const ValueMapping *> OpdsMapping) constllvm::RegisterBankInfoprotected
getPartialMapping(unsigned StartIdx, unsigned Length, const RegisterBank &RegBank) constllvm::RegisterBankInfoprotected
getRegBank(unsigned ID)llvm::RegisterBankInfoinlineprotected
getRegBank(unsigned ID) constllvm::RegisterBankInfoinline
getRegBank(unsigned Reg, const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI) constllvm::RegisterBankInfo
getRegBankBaseIdxOffset(unsigned RBIdx, unsigned Size)llvm::AArch64GenRegisterBankInfoprotectedstatic
getRegBankFromConstraints(const MachineInstr &MI, unsigned OpIdx, const TargetInstrInfo &TII, const TargetRegisterInfo &TRI) constllvm::RegisterBankInfo
getRegBankFromRegClass(const TargetRegisterClass &RC) const overridellvm::AArch64RegisterBankInfovirtual
getValueMapping(PartialMappingIdx RBIdx, unsigned Size)llvm::AArch64GenRegisterBankInfoprotectedstatic
llvm::RegisterBankInfo::getValueMapping(unsigned StartIdx, unsigned Length, const RegisterBank &RegBank) constllvm::RegisterBankInfoprotected
llvm::RegisterBankInfo::getValueMapping(const PartialMapping *BreakDown, unsigned NumBreakDowns) constllvm::RegisterBankInfoprotected
InstructionMappings typedefllvm::RegisterBankInfo
InvalidIdx enum valuellvm::AArch64GenRegisterBankInfoprotected
InvalidMappingIDllvm::RegisterBankInfostatic
Last3OpsIdx enum valuellvm::AArch64GenRegisterBankInfoprotected
LastCrossRegCpyIdx enum valuellvm::AArch64GenRegisterBankInfoprotected
MapOfInstructionMappingsllvm::RegisterBankInfomutableprotected
MapOfOperandsMappingsllvm::RegisterBankInfomutableprotected
MapOfPartialMappingsllvm::RegisterBankInfomutableprotected
MapOfValueMappingsllvm::RegisterBankInfomutableprotected
NumRegBanksllvm::RegisterBankInfoprotected
PartialMappingIdx enum namellvm::AArch64GenRegisterBankInfoprotected
PartMappingsllvm::AArch64GenRegisterBankInfoprotectedstatic
PhysRegMinimalRCsllvm::RegisterBankInfomutableprotected
PMI_FirstFPR enum valuellvm::AArch64GenRegisterBankInfoprotected
PMI_FirstGPR enum valuellvm::AArch64GenRegisterBankInfoprotected
PMI_FPR128 enum valuellvm::AArch64GenRegisterBankInfoprotected
PMI_FPR16 enum valuellvm::AArch64GenRegisterBankInfoprotected
PMI_FPR256 enum valuellvm::AArch64GenRegisterBankInfoprotected
PMI_FPR32 enum valuellvm::AArch64GenRegisterBankInfoprotected
PMI_FPR512 enum valuellvm::AArch64GenRegisterBankInfoprotected
PMI_FPR64 enum valuellvm::AArch64GenRegisterBankInfoprotected
PMI_GPR32 enum valuellvm::AArch64GenRegisterBankInfoprotected
PMI_GPR64 enum valuellvm::AArch64GenRegisterBankInfoprotected
PMI_LastFPR enum valuellvm::AArch64GenRegisterBankInfoprotected
PMI_LastGPR enum valuellvm::AArch64GenRegisterBankInfoprotected
PMI_Min enum valuellvm::AArch64GenRegisterBankInfoprotected
PMI_None enum valuellvm::AArch64GenRegisterBankInfoprotected
RegBanksllvm::RegisterBankInfoprotected
RegisterBankInfo(RegisterBank **RegBanks, unsigned NumRegBanks)llvm::RegisterBankInfoprotected
RegisterBankInfo()llvm::RegisterBankInfoinlineprotected
ScalarAddx2llvm::RegisterBankInfo
ValMappingsllvm::AArch64GenRegisterBankInfoprotectedstatic
ValueMappingIdx enum namellvm::AArch64GenRegisterBankInfoprotected
VectorAddllvm::RegisterBankInfo
~RegisterBankInfo()=defaultllvm::RegisterBankInfovirtual