LLVM  8.0.1
AArch64PBQPRegAlloc.h
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1 //==- AArch64PBQPRegAlloc.h - AArch64 specific PBQP constraints --*- C++ -*-==//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64PBQPREGALOC_H
11 #define LLVM_LIB_TARGET_AARCH64_AARCH64PBQPREGALOC_H
12 
13 #include "llvm/ADT/SetVector.h"
15 
16 namespace llvm {
17 
18 class TargetRegisterInfo;
19 
20 /// Add the accumulator chaining constraint to a PBQP graph
22 public:
23  // Add A57 specific constraints to the PBQP graph.
24  void apply(PBQPRAGraph &G) override;
25 
26 private:
28  const TargetRegisterInfo *TRI;
29 
30  // Add the accumulator chaining constraint, inside the chain, i.e. so that
31  // parity(Rd) == parity(Ra).
32  // \return true if a constraint was added
33  bool addIntraChainConstraint(PBQPRAGraph &G, unsigned Rd, unsigned Ra);
34 
35  // Add constraints between existing chains
36  void addInterChainConstraint(PBQPRAGraph &G, unsigned Rd, unsigned Ra);
37 };
38 
39 } // end namespace llvm
40 
41 #endif // LLVM_LIB_TARGET_AARCH64_AARCH64PBQPREGALOC_H
Abstract base for classes implementing PBQP register allocation constraints (e.g. ...
This class represents lattice values for constants.
Definition: AllocatorList.h:24
void apply(PBQPRAGraph &G) override
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
const DataFlowGraph & G
Definition: RDFGraph.cpp:211
Add the accumulator chaining constraint to a PBQP graph.