#include "Target/AMDGPU/SIMachineFunctionInfo.h"
Definition at line 194 of file SIMachineFunctionInfo.h.
◆ SpilledReg() [1/2]
llvm::SIMachineFunctionInfo::SpilledReg::SpilledReg |
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default |
◆ SpilledReg() [2/2]
llvm::SIMachineFunctionInfo::SpilledReg::SpilledReg |
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unsigned |
R, |
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int |
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inline |
◆ hasLane()
bool llvm::SIMachineFunctionInfo::SpilledReg::hasLane |
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inline |
◆ hasReg()
bool llvm::SIMachineFunctionInfo::SpilledReg::hasReg |
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inline |
◆ Lane
int llvm::SIMachineFunctionInfo::SpilledReg::Lane = -1 |
◆ VGPR
unsigned llvm::SIMachineFunctionInfo::SpilledReg::VGPR = 0 |
The documentation for this struct was generated from the following file: