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LLVM
8.0.1
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This is the complete list of members for llvm::Mips16InstrInfo, including all inherited members.
| AddiuSpImm(int64_t Imm) const | llvm::Mips16InstrInfo | |
| adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const override | llvm::Mips16InstrInfo | virtual |
| analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override | llvm::MipsInstrInfo | |
| analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify, SmallVectorImpl< MachineInstr *> &BranchInstrs) const | llvm::MipsInstrInfo | |
| BranchType enum name | llvm::MipsInstrInfo | |
| BT_Cond enum value | llvm::MipsInstrInfo | |
| BT_CondUncond enum value | llvm::MipsInstrInfo | |
| BT_Indirect enum value | llvm::MipsInstrInfo | |
| BT_NoBranch enum value | llvm::MipsInstrInfo | |
| BT_None enum value | llvm::MipsInstrInfo | |
| BT_Uncond enum value | llvm::MipsInstrInfo | |
| BuildAddiuSpImm(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, int64_t Imm) const | llvm::Mips16InstrInfo | |
| copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const override | llvm::Mips16InstrInfo | |
| create(MipsSubtarget &STI) | llvm::MipsInstrInfo | static |
| decomposeMachineOperandsTargetFlags(unsigned TF) const override | llvm::MipsInstrInfo | |
| expandPostRAPseudo(MachineInstr &MI) const override | llvm::Mips16InstrInfo | |
| findCommutedOpIndices(MachineInstr &MI, unsigned &SrcOpIdx1, unsigned &SrcOpIdx2) const override | llvm::MipsInstrInfo | |
| genInstrWithNewOpc(unsigned NewOpc, MachineBasicBlock::iterator I) const | llvm::MipsInstrInfo | |
| getEquivalentCompactForm(const MachineBasicBlock::iterator I) const | llvm::MipsInstrInfo | |
| getInstSizeInBytes(const MachineInstr &MI) const override | llvm::MipsInstrInfo | |
| GetMemOperand(MachineBasicBlock &MBB, int FI, MachineMemOperand::Flags Flags) const | llvm::MipsInstrInfo | protected |
| getOppositeBranchOpc(unsigned Opc) const override | llvm::Mips16InstrInfo | virtual |
| getRegisterInfo() const override | llvm::Mips16InstrInfo | virtual |
| getSerializableDirectMachineOperandTargetFlags() const override | llvm::MipsInstrInfo | |
| HasForbiddenSlot(const MachineInstr &MI) const | llvm::MipsInstrInfo | |
| insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override | llvm::MipsInstrInfo | |
| insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override | llvm::MipsInstrInfo | |
| isBranchOffsetInRange(unsigned BranchOpc, int64_t BrOffset) const override | llvm::MipsInstrInfo | |
| isCopyInstrImpl(const MachineInstr &MI, const MachineOperand *&Source, const MachineOperand *&Destination) const override | llvm::Mips16InstrInfo | protected |
| isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex) const override | llvm::Mips16InstrInfo | |
| isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const override | llvm::Mips16InstrInfo | |
| isZeroImm(const MachineOperand &op) const | llvm::MipsInstrInfo | protected |
| loadImmediate(unsigned FrameReg, int64_t Imm, MachineBasicBlock &MBB, MachineBasicBlock::iterator II, const DebugLoc &DL, unsigned &NewImm) const | llvm::Mips16InstrInfo | |
| loadRegFromStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const override | llvm::Mips16InstrInfo | virtual |
| loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override | llvm::MipsInstrInfo | inline |
| makeFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const | llvm::Mips16InstrInfo | |
| Mips16InstrInfo(const MipsSubtarget &STI) | llvm::Mips16InstrInfo | explicit |
| MipsInstrInfo(const MipsSubtarget &STI, unsigned UncondBrOpc) | llvm::MipsInstrInfo | explicit |
| removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override | llvm::MipsInstrInfo | |
| restoreFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const | llvm::Mips16InstrInfo | |
| reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override | llvm::MipsInstrInfo | |
| SafeInForbiddenSlot(const MachineInstr &MI) const | llvm::MipsInstrInfo | |
| storeRegToStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const override | llvm::Mips16InstrInfo | virtual |
| storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override | llvm::MipsInstrInfo | inline |
| Subtarget | llvm::MipsInstrInfo | protected |
| UncondBrOpc | llvm::MipsInstrInfo | protected |
| validImmediate(unsigned Opcode, unsigned Reg, int64_t Amount) | llvm::Mips16InstrInfo | static |
| validSpImm8(int offset) | llvm::Mips16InstrInfo | inlinestatic |
| verifyInstruction(const MachineInstr &MI, StringRef &ErrInfo) const override | llvm::MipsInstrInfo |
1.8.13