| addImplicitDefUseOperands(MachineFunction &MF) | llvm::MachineInstr | |
| addMemOperand(MachineFunction &MF, MachineMemOperand *MO) | llvm::MachineInstr | |
| addOperand(MachineFunction &MF, const MachineOperand &Op) | llvm::MachineInstr | |
| addOperand(const MachineOperand &Op) | llvm::MachineInstr | |
| addRegisterDead(unsigned Reg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false) | llvm::MachineInstr | |
| addRegisterDefined(unsigned Reg, const TargetRegisterInfo *RegInfo=nullptr) | llvm::MachineInstr | |
| addRegisterKilled(unsigned IncomingReg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false) | llvm::MachineInstr | |
| allDefsAreDead() const | llvm::MachineInstr | |
| AllInBundle enum value | llvm::MachineInstr | |
| AnyInBundle enum value | llvm::MachineInstr | |
| BundledPred enum value | llvm::MachineInstr | |
| BundledSucc enum value | llvm::MachineInstr | |
| bundleWithPred() | llvm::MachineInstr | |
| bundleWithSucc() | llvm::MachineInstr | |
| canFoldAsLoad(QueryType Type=IgnoreBundle) const | llvm::MachineInstr | inline |
| changeDebugValuesDefReg(unsigned Reg) | llvm::MachineInstr | |
| CheckDefs enum value | llvm::MachineInstr | |
| CheckKillDead enum value | llvm::MachineInstr | |
| clearAsmPrinterFlag(CommentFlag Flag) | llvm::MachineInstr | inline |
| clearAsmPrinterFlags() | llvm::MachineInstr | inline |
| clearFlag(MIFlag Flag) | llvm::MachineInstr | inline |
| clearKillInfo() | llvm::MachineInstr | |
| clearRegisterDeads(unsigned Reg) | llvm::MachineInstr | |
| clearRegisterKills(unsigned Reg, const TargetRegisterInfo *RegInfo) | llvm::MachineInstr | |
| cloneMemRefs(MachineFunction &MF, const MachineInstr &MI) | llvm::MachineInstr | |
| cloneMergedMemRefs(MachineFunction &MF, ArrayRef< const MachineInstr *> MIs) | llvm::MachineInstr | |
| collectDebugValues(SmallVectorImpl< MachineInstr *> &DbgValues) | llvm::MachineInstr | |
| CommentFlag enum name | llvm::MachineInstr | |
| const_mop_iterator typedef | llvm::MachineInstr | |
| const_reverse_self_iterator typedef | llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type > | protected |
| const_self_iterator typedef | llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type > | protected |
| copyImplicitOps(MachineFunction &MF, const MachineInstr &MI) | llvm::MachineInstr | |
| copyIRFlags(const Instruction &I) | llvm::MachineInstr | |
| definesRegister(unsigned Reg, const TargetRegisterInfo *TRI=nullptr) const | llvm::MachineInstr | inline |
| defs() | llvm::MachineInstr | inline |
| defs() const | llvm::MachineInstr | inline |
| dropMemRefs(MachineFunction &MF) | llvm::MachineInstr | |
| dump() const | llvm::MachineInstr | |
| emitError(StringRef Msg) const | llvm::MachineInstr | |
| eraseFromBundle() | llvm::MachineInstr | |
| eraseFromParent() | llvm::MachineInstr | |
| eraseFromParentAndMarkDBGValuesForRemoval() | llvm::MachineInstr | |
| explicit_operands() | llvm::MachineInstr | inline |
| explicit_operands() const | llvm::MachineInstr | inline |
| explicit_uses() | llvm::MachineInstr | inline |
| explicit_uses() const | llvm::MachineInstr | inline |
| findFirstPredOperandIdx() const | llvm::MachineInstr | |
| findInlineAsmFlagIdx(unsigned OpIdx, unsigned *GroupNo=nullptr) const | llvm::MachineInstr | |
| findRegisterDefOperand(unsigned Reg, bool isDead=false, const TargetRegisterInfo *TRI=nullptr) | llvm::MachineInstr | inline |
| findRegisterDefOperandIdx(unsigned Reg, bool isDead=false, bool Overlap=false, const TargetRegisterInfo *TRI=nullptr) const | llvm::MachineInstr | |
| findRegisterUseOperand(unsigned Reg, bool isKill=false, const TargetRegisterInfo *TRI=nullptr) | llvm::MachineInstr | inline |
| findRegisterUseOperand(unsigned Reg, bool isKill=false, const TargetRegisterInfo *TRI=nullptr) const | llvm::MachineInstr | inline |
| findRegisterUseOperandIdx(unsigned Reg, bool isKill=false, const TargetRegisterInfo *TRI=nullptr) const | llvm::MachineInstr | |
| findTiedOperandIdx(unsigned OpIdx) const | llvm::MachineInstr | |
| FmAfn enum value | llvm::MachineInstr | |
| FmArcp enum value | llvm::MachineInstr | |
| FmContract enum value | llvm::MachineInstr | |
| FmNoInfs enum value | llvm::MachineInstr | |
| FmNoNans enum value | llvm::MachineInstr | |
| FmNsz enum value | llvm::MachineInstr | |
| FmReassoc enum value | llvm::MachineInstr | |
| FrameDestroy enum value | llvm::MachineInstr | |
| FrameSetup enum value | llvm::MachineInstr | |
| getAsmPrinterFlag(CommentFlag Flag) const | llvm::MachineInstr | inline |
| getAsmPrinterFlags() const | llvm::MachineInstr | inline |
| getBundleSize() const | llvm::MachineInstr | |
| getDebugExpression() const | llvm::MachineInstr | |
| getDebugLabel() const | llvm::MachineInstr | |
| getDebugLoc() const | llvm::MachineInstr | inline |
| getDebugVariable() const | llvm::MachineInstr | |
| getDesc() const | llvm::MachineInstr | inline |
| getFlag(MIFlag Flag) const | llvm::MachineInstr | inline |
| getFlags() const | llvm::MachineInstr | inline |
| getInlineAsmDialect() const | llvm::MachineInstr | |
| getIterator() | llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type > | inline |
| getIterator() const | llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type > | inline |
| getMF() const | llvm::MachineInstr | |
| getMF() | llvm::MachineInstr | inline |
| getNextNode() | llvm::ilist_node_with_parent< MachineInstr, MachineBasicBlock, ilist_sentinel_tracking< true > > | inline |
| getNextNode() const | llvm::ilist_node_with_parent< MachineInstr, MachineBasicBlock, ilist_sentinel_tracking< true > > | inline |
| getNumDefs() const | llvm::MachineInstr | inline |
| getNumExplicitDefs() const | llvm::MachineInstr | |
| getNumExplicitOperands() const | llvm::MachineInstr | |
| getNumMemOperands() const | llvm::MachineInstr | inline |
| getNumOperands() const | llvm::MachineInstr | inline |
| getOpcode() const | llvm::MachineInstr | inline |
| getOperand(unsigned i) const | llvm::MachineInstr | inline |
| getOperand(unsigned i) | llvm::MachineInstr | inline |
| getOperandNo(const_mop_iterator I) const | llvm::MachineInstr | inline |
| getParent() const | llvm::MachineInstr | inline |
| getParent() | llvm::MachineInstr | inline |
| getPostInstrSymbol() const | llvm::MachineInstr | inline |
| getPreInstrSymbol() const | llvm::MachineInstr | inline |
| getPrevNode() | llvm::ilist_node_with_parent< MachineInstr, MachineBasicBlock, ilist_sentinel_tracking< true > > | inline |
| getPrevNode() const | llvm::ilist_node_with_parent< MachineInstr, MachineBasicBlock, ilist_sentinel_tracking< true > > | inline |
| getRegClassConstraint(unsigned OpIdx, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const | llvm::MachineInstr | |
| getRegClassConstraintEffect(unsigned OpIdx, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const | llvm::MachineInstr | |
| getRegClassConstraintEffectForVReg(unsigned Reg, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, bool ExploreBundle=false) const | llvm::MachineInstr | |
| getReverseIterator() | llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type > | inline |
| getReverseIterator() const | llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type > | inline |
| getTypeToPrint(unsigned OpIdx, SmallBitVector &PrintedTypes, const MachineRegisterInfo &MRI) const | llvm::MachineInstr | |
| hasComplexRegisterTies() const | llvm::MachineInstr | |
| hasDelaySlot(QueryType Type=AnyInBundle) const | llvm::MachineInstr | inline |
| hasExtraDefRegAllocReq(QueryType Type=AnyInBundle) const | llvm::MachineInstr | inline |
| hasExtraSrcRegAllocReq(QueryType Type=AnyInBundle) const | llvm::MachineInstr | inline |
| hasOneMemOperand() const | llvm::MachineInstr | inline |
| hasOptionalDef(QueryType Type=IgnoreBundle) const | llvm::MachineInstr | inline |
| hasOrderedMemoryRef() const | llvm::MachineInstr | |
| hasPostISelHook(QueryType Type=IgnoreBundle) const | llvm::MachineInstr | inline |
| hasProperty(unsigned MCFlag, QueryType Type=AnyInBundle) const | llvm::MachineInstr | inline |
| hasRegisterImplicitUseOperand(unsigned Reg) const | llvm::MachineInstr | |
| hasUnmodeledSideEffects() const | llvm::MachineInstr | |
| IgnoreBundle enum value | llvm::MachineInstr | |
| IgnoreDefs enum value | llvm::MachineInstr | |
| IgnoreVRegDefs enum value | llvm::MachineInstr | |
| ilist_callback_traits< MachineBasicBlock > | llvm::MachineInstr | friend |
| ilist_node_impl()=default | llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type > | protected |
| ilist_node_with_parent()=default | llvm::ilist_node_with_parent< MachineInstr, MachineBasicBlock, ilist_sentinel_tracking< true > > | protected |
| ilist_traits< MachineInstr > | llvm::MachineInstr | friend |
| implicit_operands() | llvm::MachineInstr | inline |
| implicit_operands() const | llvm::MachineInstr | inline |
| isAnnotationLabel() const | llvm::MachineInstr | inline |
| isAsCheapAsAMove(QueryType Type=AllInBundle) const | llvm::MachineInstr | inline |
| isBarrier(QueryType Type=AnyInBundle) const | llvm::MachineInstr | inline |
| isBitcast(QueryType Type=IgnoreBundle) const | llvm::MachineInstr | inline |
| isBranch(QueryType Type=AnyInBundle) const | llvm::MachineInstr | inline |
| isBundle() const | llvm::MachineInstr | inline |
| isBundled() const | llvm::MachineInstr | inline |
| isBundledWithPred() const | llvm::MachineInstr | inline |
| isBundledWithSucc() const | llvm::MachineInstr | inline |
| isCall(QueryType Type=AnyInBundle) const | llvm::MachineInstr | inline |
| isCFIInstruction() const | llvm::MachineInstr | inline |
| isCommutable(QueryType Type=IgnoreBundle) const | llvm::MachineInstr | inline |
| isCompare(QueryType Type=IgnoreBundle) const | llvm::MachineInstr | inline |
| isConditionalBranch(QueryType Type=AnyInBundle) const | llvm::MachineInstr | inline |
| isConstantValuePHI() const | llvm::MachineInstr | |
| isConvergent(QueryType Type=AnyInBundle) const | llvm::MachineInstr | inline |
| isConvertibleTo3Addr(QueryType Type=IgnoreBundle) const | llvm::MachineInstr | inline |
| isCopy() const | llvm::MachineInstr | inline |
| isCopyLike() const | llvm::MachineInstr | inline |
| isDebugInstr() const | llvm::MachineInstr | inline |
| isDebugLabel() const | llvm::MachineInstr | inline |
| isDebugValue() const | llvm::MachineInstr | inline |
| isDereferenceableInvariantLoad(AliasAnalysis *AA) const | llvm::MachineInstr | |
| isEHLabel() const | llvm::MachineInstr | inline |
| isEHScopeReturn(QueryType Type=AnyInBundle) const | llvm::MachineInstr | inline |
| IsExact enum value | llvm::MachineInstr | |
| isExtractSubreg() const | llvm::MachineInstr | inline |
| isExtractSubregLike(QueryType Type=IgnoreBundle) const | llvm::MachineInstr | inline |
| isFullCopy() const | llvm::MachineInstr | inline |
| isGCLabel() const | llvm::MachineInstr | inline |
| isIdenticalTo(const MachineInstr &Other, MICheckType Check=CheckDefs) const | llvm::MachineInstr | |
| isIdentityCopy() const | llvm::MachineInstr | inline |
| isImplicitDef() const | llvm::MachineInstr | inline |
| isIndirectBranch(QueryType Type=AnyInBundle) const | llvm::MachineInstr | inline |
| isIndirectDebugValue() const | llvm::MachineInstr | inline |
| isInlineAsm() const | llvm::MachineInstr | inline |
| isInsertSubreg() const | llvm::MachineInstr | inline |
| isInsertSubregLike(QueryType Type=IgnoreBundle) const | llvm::MachineInstr | inline |
| isInsideBundle() const | llvm::MachineInstr | inline |
| isKill() const | llvm::MachineInstr | inline |
| isLabel() const | llvm::MachineInstr | inline |
| isLoadFoldBarrier() const | llvm::MachineInstr | |
| isMetaInstruction() const | llvm::MachineInstr | inline |
| isMoveImmediate(QueryType Type=IgnoreBundle) const | llvm::MachineInstr | inline |
| isMoveReg(QueryType Type=IgnoreBundle) const | llvm::MachineInstr | inline |
| isMSInlineAsm() const | llvm::MachineInstr | inline |
| isNotDuplicable(QueryType Type=AnyInBundle) const | llvm::MachineInstr | inline |
| isOperandSubregIdx(unsigned OpIdx) const | llvm::MachineInstr | inline |
| isPHI() const | llvm::MachineInstr | inline |
| isPosition() const | llvm::MachineInstr | inline |
| isPredicable(QueryType Type=AllInBundle) const | llvm::MachineInstr | inline |
| isPseudo(QueryType Type=IgnoreBundle) const | llvm::MachineInstr | inline |
| isRegSequence() const | llvm::MachineInstr | inline |
| isRegSequenceLike(QueryType Type=IgnoreBundle) const | llvm::MachineInstr | inline |
| isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx=nullptr) const | llvm::MachineInstr | inline |
| isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx=nullptr) const | llvm::MachineInstr | inline |
| isRematerializable(QueryType Type=AllInBundle) const | llvm::MachineInstr | inline |
| isReturn(QueryType Type=AnyInBundle) const | llvm::MachineInstr | inline |
| isSafeToMove(AliasAnalysis *AA, bool &SawStore) const | llvm::MachineInstr | |
| isSelect(QueryType Type=IgnoreBundle) const | llvm::MachineInstr | inline |
| isSentinel() const | llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type > | inline |
| isStackAligningInlineAsm() const | llvm::MachineInstr | |
| isSubregToReg() const | llvm::MachineInstr | inline |
| isTerminator(QueryType Type=AnyInBundle) const | llvm::MachineInstr | inline |
| isTransient() const | llvm::MachineInstr | inline |
| isUnconditionalBranch(QueryType Type=AnyInBundle) const | llvm::MachineInstr | inline |
| isVariadic(QueryType Type=IgnoreBundle) const | llvm::MachineInstr | inline |
| killsRegister(unsigned Reg, const TargetRegisterInfo *TRI=nullptr) const | llvm::MachineInstr | inline |
| MachineFunction class | llvm::MachineInstr | friend |
| MachineInstr(const MachineInstr &)=delete | llvm::MachineInstr | |
| mayAlias(AliasAnalysis *AA, MachineInstr &Other, bool UseTBAA) | llvm::MachineInstr | |
| mayLoad(QueryType Type=AnyInBundle) const | llvm::MachineInstr | inline |
| mayLoadOrStore(QueryType Type=AnyInBundle) const | llvm::MachineInstr | inline |
| mayStore(QueryType Type=AnyInBundle) const | llvm::MachineInstr | inline |
| memoperands() const | llvm::MachineInstr | inline |
| memoperands_begin() const | llvm::MachineInstr | inline |
| memoperands_empty() const | llvm::MachineInstr | inline |
| memoperands_end() const | llvm::MachineInstr | inline |
| mergeFlagsWith(const MachineInstr &Other) const | llvm::MachineInstr | |
| MICheckType enum name | llvm::MachineInstr | |
| MIFlag enum name | llvm::MachineInstr | |
| mmo_iterator typedef | llvm::MachineInstr | |
| modifiesRegister(unsigned Reg, const TargetRegisterInfo *TRI) const | llvm::MachineInstr | inline |
| mop_iterator typedef | llvm::MachineInstr | |
| NoFlags enum value | llvm::MachineInstr | |
| NoSchedComment enum value | llvm::MachineInstr | |
| NoSWrap enum value | llvm::MachineInstr | |
| NoUWrap enum value | llvm::MachineInstr | |
| operands() | llvm::MachineInstr | inline |
| operands() const | llvm::MachineInstr | inline |
| operands_begin() | llvm::MachineInstr | inline |
| operands_begin() const | llvm::MachineInstr | inline |
| operands_end() | llvm::MachineInstr | inline |
| operands_end() const | llvm::MachineInstr | inline |
| operator=(const MachineInstr &)=delete | llvm::MachineInstr | |
| print(raw_ostream &OS, bool IsStandalone=true, bool SkipOpers=false, bool SkipDebugLoc=false, bool AddNewLine=true, const TargetInstrInfo *TII=nullptr) const | llvm::MachineInstr | |
| print(raw_ostream &OS, ModuleSlotTracker &MST, bool IsStandalone=true, bool SkipOpers=false, bool SkipDebugLoc=false, bool AddNewLine=true, const TargetInstrInfo *TII=nullptr) const | llvm::MachineInstr | |
| QueryType enum name | llvm::MachineInstr | |
| readsRegister(unsigned Reg, const TargetRegisterInfo *TRI=nullptr) const | llvm::MachineInstr | inline |
| readsVirtualRegister(unsigned Reg) const | llvm::MachineInstr | inline |
| readsWritesVirtualRegister(unsigned Reg, SmallVectorImpl< unsigned > *Ops=nullptr) const | llvm::MachineInstr | |
| registerDefIsDead(unsigned Reg, const TargetRegisterInfo *TRI=nullptr) const | llvm::MachineInstr | inline |
| ReloadReuse enum value | llvm::MachineInstr | |
| removeFromBundle() | llvm::MachineInstr | |
| removeFromParent() | llvm::MachineInstr | |
| RemoveOperand(unsigned OpNo) | llvm::MachineInstr | |
| reverse_self_iterator typedef | llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type > | protected |
| self_iterator typedef | llvm::ilist_node_impl< ilist_detail::compute_node_options< MachineInstr, Options... >::type > | protected |
| setAsmPrinterFlag(uint8_t Flag) | llvm::MachineInstr | inline |
| setDebugLoc(DebugLoc dl) | llvm::MachineInstr | inline |
| setDesc(const MCInstrDesc &tid) | llvm::MachineInstr | inline |
| setFlag(MIFlag Flag) | llvm::MachineInstr | inline |
| setFlags(unsigned flags) | llvm::MachineInstr | inline |
| setMemRefs(MachineFunction &MF, ArrayRef< MachineMemOperand *> MemRefs) | llvm::MachineInstr | |
| setPhysRegsDeadExcept(ArrayRef< unsigned > UsedRegs, const TargetRegisterInfo &TRI) | llvm::MachineInstr | |
| setPostInstrSymbol(MachineFunction &MF, MCSymbol *Symbol) | llvm::MachineInstr | |
| setPreInstrSymbol(MachineFunction &MF, MCSymbol *Symbol) | llvm::MachineInstr | |
| setRegisterDefReadUndef(unsigned Reg, bool IsUndef=true) | llvm::MachineInstr | |
| substituteRegister(unsigned FromReg, unsigned ToReg, unsigned SubIdx, const TargetRegisterInfo &RegInfo) | llvm::MachineInstr | |
| TAsmComments enum value | llvm::MachineInstr | |
| tieOperands(unsigned DefIdx, unsigned UseIdx) | llvm::MachineInstr | |
| unbundleFromPred() | llvm::MachineInstr | |
| unbundleFromSucc() | llvm::MachineInstr | |
| untieRegOperand(unsigned OpIdx) | llvm::MachineInstr | inline |
| uses() | llvm::MachineInstr | inline |
| uses() const | llvm::MachineInstr | inline |
| usesCustomInsertionHook(QueryType Type=IgnoreBundle) const | llvm::MachineInstr | inline |
| ~MachineInstr()=delete | llvm::MachineInstr | |