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LLVM
8.0.1
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This is the complete list of members for llvm::AArch64InstrInfo, including all inherited members.
| AArch64InstrInfo(const AArch64Subtarget &STI) | llvm::AArch64InstrInfo | explicit |
| analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const override | llvm::AArch64InstrInfo | |
| analyzeCompare(const MachineInstr &MI, unsigned &SrcReg, unsigned &SrcReg2, int &CmpMask, int &CmpValue) const override | llvm::AArch64InstrInfo | |
| areMemAccessesTriviallyDisjoint(MachineInstr &MIa, MachineInstr &MIb, AliasAnalysis *AA=nullptr) const override | llvm::AArch64InstrInfo | |
| buildOutlinedFrame(MachineBasicBlock &MBB, MachineFunction &MF, const outliner::OutlinedFunction &OF) const override | llvm::AArch64InstrInfo | |
| canInsertSelect(const MachineBasicBlock &, ArrayRef< MachineOperand > Cond, unsigned, unsigned, int &, int &, int &) const override | llvm::AArch64InstrInfo | |
| convertToFlagSettingOpc(unsigned Opc, bool &Is64Bit) | llvm::AArch64InstrInfo | static |
| copyGPRRegTuple(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc, unsigned Opcode, unsigned ZeroReg, llvm::ArrayRef< unsigned > Indices) const | llvm::AArch64InstrInfo | |
| copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const override | llvm::AArch64InstrInfo | |
| copyPhysRegTuple(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, unsigned DestReg, unsigned SrcReg, bool KillSrc, unsigned Opcode, llvm::ArrayRef< unsigned > Indices) const | llvm::AArch64InstrInfo | |
| decomposeMachineOperandsTargetFlags(unsigned TF) const override | llvm::AArch64InstrInfo | |
| expandPostRAPseudo(MachineInstr &MI) const override | llvm::AArch64InstrInfo | |
| foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI, ArrayRef< unsigned > Ops, MachineBasicBlock::iterator InsertPt, int FrameIndex, LiveIntervals *LIS=nullptr) const override | llvm::AArch64InstrInfo | |
| genAlternativeCodeSequence(MachineInstr &Root, MachineCombinerPattern Pattern, SmallVectorImpl< MachineInstr *> &InsInstrs, SmallVectorImpl< MachineInstr *> &DelInstrs, DenseMap< unsigned, unsigned > &InstrIdxForVirtReg) const override | llvm::AArch64InstrInfo | |
| getBranchDestBlock(const MachineInstr &MI) const override | llvm::AArch64InstrInfo | |
| getInstSizeInBytes(const MachineInstr &MI) const override | llvm::AArch64InstrInfo | |
| getMachineCombinerPatterns(MachineInstr &Root, SmallVectorImpl< MachineCombinerPattern > &Patterns) const override | llvm::AArch64InstrInfo | |
| getMemOpBaseRegImmOfsOffsetOperand(MachineInstr &LdSt) const | llvm::AArch64InstrInfo | |
| getMemOperandWithOffset(MachineInstr &MI, MachineOperand *&BaseOp, int64_t &Offset, const TargetRegisterInfo *TRI) const override | llvm::AArch64InstrInfo | |
| getMemOperandWithOffsetWidth(MachineInstr &MI, MachineOperand *&BaseOp, int64_t &Offset, unsigned &Width, const TargetRegisterInfo *TRI) const | llvm::AArch64InstrInfo | |
| getMemOpInfo(unsigned Opcode, unsigned &Scale, unsigned &Width, int64_t &MinOffset, int64_t &MaxOffset) const | llvm::AArch64InstrInfo | |
| getNoop(MCInst &NopInst) const override | llvm::AArch64InstrInfo | |
| getOutliningCandidateInfo(std::vector< outliner::Candidate > &RepeatedSequenceLocs) const override | llvm::AArch64InstrInfo | |
| getOutliningType(MachineBasicBlock::iterator &MIT, unsigned Flags) const override | llvm::AArch64InstrInfo | |
| getRegisterInfo() const | llvm::AArch64InstrInfo | inline |
| getSerializableBitmaskMachineOperandTargetFlags() const override | llvm::AArch64InstrInfo | |
| getSerializableDirectMachineOperandTargetFlags() const override | llvm::AArch64InstrInfo | |
| getSerializableMachineMemOperandTargetFlags() const override | llvm::AArch64InstrInfo | |
| insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override | llvm::AArch64InstrInfo | |
| insertOutlinedCall(Module &M, MachineBasicBlock &MBB, MachineBasicBlock::iterator &It, MachineFunction &MF, const outliner::Candidate &C) const override | llvm::AArch64InstrInfo | |
| insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, unsigned DstReg, ArrayRef< MachineOperand > Cond, unsigned TrueReg, unsigned FalseReg) const override | llvm::AArch64InstrInfo | |
| isAsCheapAsAMove(const MachineInstr &MI) const override | llvm::AArch64InstrInfo | |
| isAssociativeAndCommutative(const MachineInstr &Inst) const override | llvm::AArch64InstrInfo | |
| isBranchOffsetInRange(unsigned BranchOpc, int64_t BrOffset) const override | llvm::AArch64InstrInfo | |
| isCandidateToMergeOrPair(MachineInstr &MI) const | llvm::AArch64InstrInfo | |
| isCoalescableExtInstr(const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg, unsigned &SubIdx) const override | llvm::AArch64InstrInfo | |
| isFalkorShiftExtFast(const MachineInstr &MI) | llvm::AArch64InstrInfo | static |
| isFPRCopy(const MachineInstr &MI) | llvm::AArch64InstrInfo | static |
| isFunctionSafeToOutlineFrom(MachineFunction &MF, bool OutlineFromLinkOnceODRs) const override | llvm::AArch64InstrInfo | |
| isGPRCopy(const MachineInstr &MI) | llvm::AArch64InstrInfo | static |
| isGPRZero(const MachineInstr &MI) | llvm::AArch64InstrInfo | static |
| isLdStPairSuppressed(const MachineInstr &MI) | llvm::AArch64InstrInfo | static |
| isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex) const override | llvm::AArch64InstrInfo | |
| isMBBSafeToOutlineFrom(MachineBasicBlock &MBB, unsigned &Flags) const override | llvm::AArch64InstrInfo | |
| isPairableLdStInst(const MachineInstr &MI) | llvm::AArch64InstrInfo | static |
| isSchedulingBoundary(const MachineInstr &MI, const MachineBasicBlock *MBB, const MachineFunction &MF) const override | llvm::AArch64InstrInfo | |
| isSEHInstruction(const MachineInstr &MI) | llvm::AArch64InstrInfo | static |
| isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const override | llvm::AArch64InstrInfo | |
| isStridedAccess(const MachineInstr &MI) | llvm::AArch64InstrInfo | static |
| isSubregFoldable() const override | llvm::AArch64InstrInfo | inline |
| isThroughputPattern(MachineCombinerPattern Pattern) const override | llvm::AArch64InstrInfo | |
| isUnscaledLdSt(unsigned Opc) | llvm::AArch64InstrInfo | static |
| isUnscaledLdSt(MachineInstr &MI) | llvm::AArch64InstrInfo | inlinestatic |
| loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override | llvm::AArch64InstrInfo | |
| optimizeCompareInstr(MachineInstr &CmpInstr, unsigned SrcReg, unsigned SrcReg2, int CmpMask, int CmpValue, const MachineRegisterInfo *MRI) const override | llvm::AArch64InstrInfo | |
| optimizeCondBranch(MachineInstr &MI) const override | llvm::AArch64InstrInfo | |
| removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override | llvm::AArch64InstrInfo | |
| reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override | llvm::AArch64InstrInfo | |
| shouldClusterMemOps(MachineOperand &BaseOp1, MachineOperand &BaseOp2, unsigned NumLoads) const override | llvm::AArch64InstrInfo | |
| shouldOutlineFromFunctionByDefault(MachineFunction &MF) const override | llvm::AArch64InstrInfo | |
| storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override | llvm::AArch64InstrInfo | |
| suppressLdStPair(MachineInstr &MI) | llvm::AArch64InstrInfo | static |
| useMachineCombiner() const override | llvm::AArch64InstrInfo |
1.8.13