LLVM  8.0.1
HexagonDepTimingClasses.h
Go to the documentation of this file.
1 //===----------------------------------------------------------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 // Automatically generated file, please consult code owner before editing.
10 //===----------------------------------------------------------------------===//
11 
12 
13 #ifndef TARGET_HEXAGON_HEXAGON_DEP_TIMING_CLASSES_H
14 #define TARGET_HEXAGON_HEXAGON_DEP_TIMING_CLASSES_H
15 
16 #include "HexagonInstrInfo.h"
17 
18 namespace llvm {
19 
20 inline bool is_TC3x(unsigned SchedClass) {
21  switch (SchedClass) {
22  case Hexagon::Sched::tc_05d3a09b:
23  case Hexagon::Sched::tc_0d8f5752:
24  case Hexagon::Sched::tc_13bfbcf9:
25  case Hexagon::Sched::tc_174516e8:
26  case Hexagon::Sched::tc_1a2fd869:
27  case Hexagon::Sched::tc_1c4528a2:
28  case Hexagon::Sched::tc_32779c6f:
29  case Hexagon::Sched::tc_5b54b33f:
30  case Hexagon::Sched::tc_6b25e783:
31  case Hexagon::Sched::tc_76851da1:
32  case Hexagon::Sched::tc_9debc299:
33  case Hexagon::Sched::tc_a9d88b22:
34  case Hexagon::Sched::tc_bafaade3:
35  case Hexagon::Sched::tc_bcf98408:
36  case Hexagon::Sched::tc_bdceeac1:
37  case Hexagon::Sched::tc_c8ce0b5c:
38  case Hexagon::Sched::tc_d1aa9eaa:
39  case Hexagon::Sched::tc_d773585a:
40  case Hexagon::Sched::tc_df3319ed:
41  return true;
42  default:
43  return false;
44  }
45 }
46 
47 inline bool is_TC2early(unsigned SchedClass) {
48  switch (SchedClass) {
49  case Hexagon::Sched::tc_b4407292:
50  case Hexagon::Sched::tc_fc3999b4:
51  return true;
52  default:
53  return false;
54  }
55 }
56 
57 inline bool is_TC4x(unsigned SchedClass) {
58  switch (SchedClass) {
59  case Hexagon::Sched::tc_2f7c551d:
60  case Hexagon::Sched::tc_2ff964b4:
61  case Hexagon::Sched::tc_3a867367:
62  case Hexagon::Sched::tc_3b470976:
63  case Hexagon::Sched::tc_4560740b:
64  case Hexagon::Sched::tc_a58fd5cc:
65  case Hexagon::Sched::tc_b8bffe55:
66  return true;
67  default:
68  return false;
69  }
70 }
71 
72 inline bool is_TC2(unsigned SchedClass) {
73  switch (SchedClass) {
74  case Hexagon::Sched::tc_002cb246:
75  case Hexagon::Sched::tc_14b5c689:
76  case Hexagon::Sched::tc_1c80410a:
77  case Hexagon::Sched::tc_4414d8b1:
78  case Hexagon::Sched::tc_6132ba3d:
79  case Hexagon::Sched::tc_61830035:
80  case Hexagon::Sched::tc_679309b8:
81  case Hexagon::Sched::tc_703e822c:
82  case Hexagon::Sched::tc_779080bf:
83  case Hexagon::Sched::tc_784490da:
84  case Hexagon::Sched::tc_88b4f13d:
85  case Hexagon::Sched::tc_9461ff31:
86  case Hexagon::Sched::tc_9e313203:
87  case Hexagon::Sched::tc_a813cf9a:
88  case Hexagon::Sched::tc_bfec0f01:
89  case Hexagon::Sched::tc_cf8126ae:
90  case Hexagon::Sched::tc_d08ee0f4:
91  case Hexagon::Sched::tc_e4a7f9f0:
92  case Hexagon::Sched::tc_f429765c:
93  case Hexagon::Sched::tc_f675fee8:
94  case Hexagon::Sched::tc_f9058dd7:
95  return true;
96  default:
97  return false;
98  }
99 }
100 
101 inline bool is_TC1(unsigned SchedClass) {
102  switch (SchedClass) {
103  case Hexagon::Sched::tc_0663f615:
104  case Hexagon::Sched::tc_0a705168:
105  case Hexagon::Sched::tc_0ae0825c:
106  case Hexagon::Sched::tc_1b6f7cec:
107  case Hexagon::Sched::tc_1fc97744:
108  case Hexagon::Sched::tc_20cdee80:
109  case Hexagon::Sched::tc_2332b92e:
110  case Hexagon::Sched::tc_2eabeebe:
111  case Hexagon::Sched::tc_3d495a39:
112  case Hexagon::Sched::tc_4c5ba658:
113  case Hexagon::Sched::tc_56336eb0:
114  case Hexagon::Sched::tc_56f114f4:
115  case Hexagon::Sched::tc_57890846:
116  case Hexagon::Sched::tc_5a2711e5:
117  case Hexagon::Sched::tc_5b7c0967:
118  case Hexagon::Sched::tc_640086b5:
119  case Hexagon::Sched::tc_643b4717:
120  case Hexagon::Sched::tc_85c9c08f:
121  case Hexagon::Sched::tc_85d5d03f:
122  case Hexagon::Sched::tc_862b3e70:
123  case Hexagon::Sched::tc_946df596:
124  case Hexagon::Sched::tc_9c3ecd83:
125  case Hexagon::Sched::tc_9fc3dae0:
126  case Hexagon::Sched::tc_a1123dda:
127  case Hexagon::Sched::tc_a1c00888:
128  case Hexagon::Sched::tc_ae53734a:
129  case Hexagon::Sched::tc_b31c2e97:
130  case Hexagon::Sched::tc_b4b5c03a:
131  case Hexagon::Sched::tc_b51dc29a:
132  case Hexagon::Sched::tc_cd374165:
133  case Hexagon::Sched::tc_cfd8378a:
134  case Hexagon::Sched::tc_d5b7b0c1:
135  case Hexagon::Sched::tc_d9d43ecb:
136  case Hexagon::Sched::tc_db2bce9c:
137  case Hexagon::Sched::tc_de4df740:
138  case Hexagon::Sched::tc_de554571:
139  case Hexagon::Sched::tc_e78647bd:
140  return true;
141  default:
142  return false;
143  }
144 }
145 } // namespace llvm
146 
147 #endif
bool is_TC2early(unsigned SchedClass)
This class represents lattice values for constants.
Definition: AllocatorList.h:24
bool is_TC1(unsigned SchedClass)
bool is_TC2(unsigned SchedClass)
bool is_TC3x(unsigned SchedClass)
bool is_TC4x(unsigned SchedClass)