LLVM
8.0.1
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This is the complete list of members for llvm::RISCVInstrInfo, including all inherited members.
analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override | llvm::RISCVInstrInfo | |
copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, unsigned DstReg, unsigned SrcReg, bool KillSrc) const override | llvm::RISCVInstrInfo | |
getBranchDestBlock(const MachineInstr &MI) const override | llvm::RISCVInstrInfo | |
getInstSizeInBytes(const MachineInstr &MI) const override | llvm::RISCVInstrInfo | |
insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &dl, int *BytesAdded=nullptr) const override | llvm::RISCVInstrInfo | |
insertIndirectBranch(MachineBasicBlock &MBB, MachineBasicBlock &NewDestBB, const DebugLoc &DL, int64_t BrOffset, RegScavenger *RS=nullptr) const override | llvm::RISCVInstrInfo | |
isBranchOffsetInRange(unsigned BranchOpc, int64_t BrOffset) const override | llvm::RISCVInstrInfo | |
isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex) const override | llvm::RISCVInstrInfo | |
isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const override | llvm::RISCVInstrInfo | |
loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DstReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override | llvm::RISCVInstrInfo | |
movImm32(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, unsigned DstReg, uint64_t Val, MachineInstr::MIFlag Flag=MachineInstr::NoFlags) const | llvm::RISCVInstrInfo | |
removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override | llvm::RISCVInstrInfo | |
reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override | llvm::RISCVInstrInfo | |
RISCVInstrInfo() | llvm::RISCVInstrInfo | |
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool IsKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override | llvm::RISCVInstrInfo |