llvm::AArch64Subtarget Member List

This is the complete list of members for llvm::AArch64Subtarget, including all inherited members.

AArch64Subtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM, bool LittleEndian)	llvm::AArch64Subtarget
ARMProcFamily	llvm::AArch64Subtarget	protected
ARMProcFamilyEnum enum name	llvm::AArch64Subtarget
BalanceFPOps	llvm::AArch64Subtarget	protected
balanceFPOps() const	llvm::AArch64Subtarget	inline
CacheLineSize	llvm::AArch64Subtarget	protected
CallLoweringInfo	llvm::AArch64Subtarget	protected
classifyGlobalFunctionReference(const GlobalValue *GV, const TargetMachine &TM) const	llvm::AArch64Subtarget
ClassifyGlobalReference(const GlobalValue *GV, const TargetMachine &TM) const	llvm::AArch64Subtarget
CortexA35 enum value	llvm::AArch64Subtarget
CortexA53 enum value	llvm::AArch64Subtarget
CortexA55 enum value	llvm::AArch64Subtarget
CortexA57 enum value	llvm::AArch64Subtarget
CortexA72 enum value	llvm::AArch64Subtarget
CortexA73 enum value	llvm::AArch64Subtarget
CortexA75 enum value	llvm::AArch64Subtarget
CustomAsCheapAsMove	llvm::AArch64Subtarget	protected
CustomCallSavedXRegs	llvm::AArch64Subtarget	protected
Cyclone enum value	llvm::AArch64Subtarget
DisableLatencySchedHeuristic	llvm::AArch64Subtarget	protected
enableEarlyIfConversion() const override	llvm::AArch64Subtarget
enableMachineScheduler() const override	llvm::AArch64Subtarget	inline
enablePostRAScheduler() const override	llvm::AArch64Subtarget	inline
ExynosAsCheapAsMove	llvm::AArch64Subtarget	protected
ExynosM1 enum value	llvm::AArch64Subtarget
ExynosM3 enum value	llvm::AArch64Subtarget
Falkor enum value	llvm::AArch64Subtarget
Force32BitJumpTables	llvm::AArch64Subtarget	protected
force32BitJumpTables() const	llvm::AArch64Subtarget	inline
FrameLowering	llvm::AArch64Subtarget	protected
getCacheLineSize() const	llvm::AArch64Subtarget	inline
getCallLowering() const override	llvm::AArch64Subtarget
getCustomPBQPConstraints() const override	llvm::AArch64Subtarget
getFrameLowering() const override	llvm::AArch64Subtarget	inline
getInstrInfo() const override	llvm::AArch64Subtarget	inline
getInstructionSelector() const override	llvm::AArch64Subtarget
getLegalizerInfo() const override	llvm::AArch64Subtarget
getMaximumJumpTableSize() const	llvm::AArch64Subtarget	inline
getMaxInterleaveFactor() const	llvm::AArch64Subtarget	inline
getMaxPrefetchIterationsAhead() const	llvm::AArch64Subtarget	inline
getMinPrefetchStride() const	llvm::AArch64Subtarget	inline
getMinVectorRegisterBitWidth() const	llvm::AArch64Subtarget	inline
getNumXRegisterReserved() const	llvm::AArch64Subtarget	inline
getPrefetchDistance() const	llvm::AArch64Subtarget	inline
getPrefFunctionAlignment() const	llvm::AArch64Subtarget	inline
getPrefLoopAlignment() const	llvm::AArch64Subtarget	inline
getProcFamily() const	llvm::AArch64Subtarget	inline
getRegBankInfo() const override	llvm::AArch64Subtarget
getRegisterInfo() const override	llvm::AArch64Subtarget	inline
getSelectionDAGInfo() const override	llvm::AArch64Subtarget	inline
getTargetLowering() const override	llvm::AArch64Subtarget	inline
getTargetTriple() const	llvm::AArch64Subtarget	inline
getVectorInsertExtractBaseCost() const	llvm::AArch64Subtarget	inline
getWideningBaseCost() const	llvm::AArch64Subtarget	inline
HasAES	llvm::AArch64Subtarget	protected
hasAES() const	llvm::AArch64Subtarget	inline
HasAggressiveFMA	llvm::AArch64Subtarget	protected
hasAggressiveFMA() const	llvm::AArch64Subtarget	inline
HasAlternativeNZCV	llvm::AArch64Subtarget	protected
hasAlternativeNZCV() const	llvm::AArch64Subtarget	inline
HasAM	llvm::AArch64Subtarget	protected
hasAM() const	llvm::AArch64Subtarget	inline
HasArithmeticBccFusion	llvm::AArch64Subtarget	protected
hasArithmeticBccFusion() const	llvm::AArch64Subtarget	inline
HasArithmeticCbzFusion	llvm::AArch64Subtarget	protected
hasArithmeticCbzFusion() const	llvm::AArch64Subtarget	inline
HasBTI	llvm::AArch64Subtarget	protected
hasBTI() const	llvm::AArch64Subtarget	inline
HasCCDP	llvm::AArch64Subtarget	protected
hasCCDP() const	llvm::AArch64Subtarget	inline
HasCCIDX	llvm::AArch64Subtarget	protected
hasCCIDX() const	llvm::AArch64Subtarget	inline
HasCCPP	llvm::AArch64Subtarget	protected
hasCCPP() const	llvm::AArch64Subtarget	inline
HasComplxNum	llvm::AArch64Subtarget	protected
hasComplxNum() const	llvm::AArch64Subtarget	inline
hasCRC() const	llvm::AArch64Subtarget	inline
HasCRC	llvm::AArch64Subtarget	protected
hasCrypto() const	llvm::AArch64Subtarget	inline
HasCrypto	llvm::AArch64Subtarget	protected
hasCustomCallingConv() const	llvm::AArch64Subtarget	inline
hasCustomCheapAsMoveHandling() const	llvm::AArch64Subtarget	inline
HasDIT	llvm::AArch64Subtarget	protected
hasDIT() const	llvm::AArch64Subtarget	inline
hasDotProd() const	llvm::AArch64Subtarget	inline
HasDotProd	llvm::AArch64Subtarget	protected
hasExynosCheapAsMoveHandling() const	llvm::AArch64Subtarget	inline
HasFMI	llvm::AArch64Subtarget	protected
hasFMI() const	llvm::AArch64Subtarget	inline
HasFP16FML	llvm::AArch64Subtarget	protected
hasFP16FML() const	llvm::AArch64Subtarget	inline
HasFPARMv8	llvm::AArch64Subtarget	protected
hasFPARMv8() const	llvm::AArch64Subtarget	inline
HasFRInt3264	llvm::AArch64Subtarget	protected
hasFRInt3264() const	llvm::AArch64Subtarget	inline
HasFullFP16	llvm::AArch64Subtarget	protected
hasFullFP16() const	llvm::AArch64Subtarget	inline
HasFuseAddress	llvm::AArch64Subtarget	protected
hasFuseAddress() const	llvm::AArch64Subtarget	inline
HasFuseAES	llvm::AArch64Subtarget	protected
hasFuseAES() const	llvm::AArch64Subtarget	inline
HasFuseArithmeticLogic	llvm::AArch64Subtarget	protected
hasFuseArithmeticLogic() const	llvm::AArch64Subtarget	inline
HasFuseCCSelect	llvm::AArch64Subtarget	protected
hasFuseCCSelect() const	llvm::AArch64Subtarget	inline
HasFuseCryptoEOR	llvm::AArch64Subtarget	protected
hasFuseCryptoEOR() const	llvm::AArch64Subtarget	inline
HasFuseLiterals	llvm::AArch64Subtarget	protected
hasFuseLiterals() const	llvm::AArch64Subtarget	inline
hasFusion() const	llvm::AArch64Subtarget	inline
HasJS	llvm::AArch64Subtarget	protected
hasJS() const	llvm::AArch64Subtarget	inline
HasLOR	llvm::AArch64Subtarget	protected
hasLOR() const	llvm::AArch64Subtarget	inline
hasLSE() const	llvm::AArch64Subtarget	inline
HasLSE	llvm::AArch64Subtarget	protected
HasLSLFast	llvm::AArch64Subtarget	protected
hasLSLFast() const	llvm::AArch64Subtarget	inline
HasMPAM	llvm::AArch64Subtarget	protected
hasMPAM() const	llvm::AArch64Subtarget	inline
hasMTE() const	llvm::AArch64Subtarget	inline
HasMTE	llvm::AArch64Subtarget	protected
HasNEON	llvm::AArch64Subtarget	protected
hasNEON() const	llvm::AArch64Subtarget	inline
HasNV	llvm::AArch64Subtarget	protected
hasNV() const	llvm::AArch64Subtarget	inline
HasPA	llvm::AArch64Subtarget	protected
hasPA() const	llvm::AArch64Subtarget	inline
HasPAN	llvm::AArch64Subtarget	protected
hasPAN() const	llvm::AArch64Subtarget	inline
HasPAN_RWV	llvm::AArch64Subtarget	protected
hasPAN_RWV() const	llvm::AArch64Subtarget	inline
HasPerfMon	llvm::AArch64Subtarget	protected
hasPerfMon() const	llvm::AArch64Subtarget	inline
hasPredRes() const	llvm::AArch64Subtarget	inline
HasPredRes	llvm::AArch64Subtarget	protected
HasPsUAO	llvm::AArch64Subtarget	protected
hasPsUAO() const	llvm::AArch64Subtarget	inline
hasRandGen() const	llvm::AArch64Subtarget	inline
HasRandGen	llvm::AArch64Subtarget	protected
HasRAS	llvm::AArch64Subtarget	protected
hasRAS() const	llvm::AArch64Subtarget	inline
hasRASv8_4() const	llvm::AArch64Subtarget	inline
HasRASv8_4	llvm::AArch64Subtarget	protected
HasRCPC	llvm::AArch64Subtarget	protected
hasRCPC() const	llvm::AArch64Subtarget	inline
HasRCPC_IMMO	llvm::AArch64Subtarget	protected
hasRCPC_IMMO() const	llvm::AArch64Subtarget	inline
HasRDM	llvm::AArch64Subtarget	protected
hasRDM() const	llvm::AArch64Subtarget	inline
HasSB	llvm::AArch64Subtarget	protected
hasSB() const	llvm::AArch64Subtarget	inline
HasSEL2	llvm::AArch64Subtarget	protected
hasSEL2() const	llvm::AArch64Subtarget	inline
hasSHA2() const	llvm::AArch64Subtarget	inline
HasSHA2	llvm::AArch64Subtarget	protected
HasSHA3	llvm::AArch64Subtarget	protected
hasSHA3() const	llvm::AArch64Subtarget	inline
HasSM4	llvm::AArch64Subtarget	protected
hasSM4() const	llvm::AArch64Subtarget	inline
HasSPE	llvm::AArch64Subtarget	protected
hasSPE() const	llvm::AArch64Subtarget	inline
hasSpecRestrict() const	llvm::AArch64Subtarget	inline
HasSpecRestrict	llvm::AArch64Subtarget	protected
hasSSBS() const	llvm::AArch64Subtarget	inline
HasSSBS	llvm::AArch64Subtarget	protected
HasSVE	llvm::AArch64Subtarget	protected
hasSVE() const	llvm::AArch64Subtarget	inline
HasTLB_RMI	llvm::AArch64Subtarget	protected
hasTLB_RMI() const	llvm::AArch64Subtarget	inline
HasTRACEV8_4	llvm::AArch64Subtarget	protected
hasTRACEV8_4() const	llvm::AArch64Subtarget	inline
hasV8_1aOps() const	llvm::AArch64Subtarget	inline
HasV8_1aOps	llvm::AArch64Subtarget	protected
HasV8_2aOps	llvm::AArch64Subtarget	protected
hasV8_2aOps() const	llvm::AArch64Subtarget	inline
hasV8_3aOps() const	llvm::AArch64Subtarget	inline
HasV8_3aOps	llvm::AArch64Subtarget	protected
hasV8_4aOps() const	llvm::AArch64Subtarget	inline
HasV8_4aOps	llvm::AArch64Subtarget	protected
hasV8_5aOps() const	llvm::AArch64Subtarget	inline
HasV8_5aOps	llvm::AArch64Subtarget	protected
hasVH() const	llvm::AArch64Subtarget	inline
HasVH	llvm::AArch64Subtarget	protected
HasZeroCycleRegMove	llvm::AArch64Subtarget	protected
hasZeroCycleRegMove() const	llvm::AArch64Subtarget	inline
HasZeroCycleZeroing	llvm::AArch64Subtarget	protected
HasZeroCycleZeroingFP	llvm::AArch64Subtarget	protected
hasZeroCycleZeroingFP() const	llvm::AArch64Subtarget	inline
hasZeroCycleZeroingFPWorkaround() const	llvm::AArch64Subtarget	inline
HasZeroCycleZeroingFPWorkaround	llvm::AArch64Subtarget	protected
HasZeroCycleZeroingGP	llvm::AArch64Subtarget	protected
hasZeroCycleZeroingGP() const	llvm::AArch64Subtarget	inline
InstrInfo	llvm::AArch64Subtarget	protected
InstSelector	llvm::AArch64Subtarget	protected
isCallingConvWin64(CallingConv::ID CC) const	llvm::AArch64Subtarget	inline
IsLittle	llvm::AArch64Subtarget	protected
isLittleEndian() const	llvm::AArch64Subtarget	inline
isMisaligned128StoreSlow() const	llvm::AArch64Subtarget	inline
isPaired128Slow() const	llvm::AArch64Subtarget	inline
isSTRQroSlow() const	llvm::AArch64Subtarget	inline
isTargetAndroid() const	llvm::AArch64Subtarget	inline
isTargetCOFF() const	llvm::AArch64Subtarget	inline
isTargetDarwin() const	llvm::AArch64Subtarget	inline
isTargetELF() const	llvm::AArch64Subtarget	inline
isTargetFuchsia() const	llvm::AArch64Subtarget	inline
isTargetIOS() const	llvm::AArch64Subtarget	inline
isTargetLinux() const	llvm::AArch64Subtarget	inline
isTargetMachO() const	llvm::AArch64Subtarget	inline
isTargetWindows() const	llvm::AArch64Subtarget	inline
isXRaySupported() const override	llvm::AArch64Subtarget	inline
isXRegCustomCalleeSaved(size_t i) const	llvm::AArch64Subtarget	inline
isXRegisterReserved(size_t i) const	llvm::AArch64Subtarget	inline
Kryo enum value	llvm::AArch64Subtarget
Legalizer	llvm::AArch64Subtarget	protected
MaxInterleaveFactor	llvm::AArch64Subtarget	protected
MaxJumpTableSize	llvm::AArch64Subtarget	protected
MaxPrefetchIterationsAhead	llvm::AArch64Subtarget	protected
MinPrefetchStride	llvm::AArch64Subtarget	protected
MinVectorRegisterBitWidth	llvm::AArch64Subtarget	protected
mirFileLoaded(MachineFunction &MF) const override	llvm::AArch64Subtarget
Misaligned128StoreIsSlow	llvm::AArch64Subtarget	protected
NegativeImmediates	llvm::AArch64Subtarget	protected
Others enum value	llvm::AArch64Subtarget
overrideSchedPolicy(MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const override	llvm::AArch64Subtarget
Paired128IsSlow	llvm::AArch64Subtarget	protected
ParseSubtargetFeatures(StringRef CPU, StringRef FS)	llvm::AArch64Subtarget
predictableSelectIsExpensive() const	llvm::AArch64Subtarget	inline
PredictableSelectIsExpensive	llvm::AArch64Subtarget	protected
PrefetchDistance	llvm::AArch64Subtarget	protected
PrefFunctionAlignment	llvm::AArch64Subtarget	protected
PrefLoopAlignment	llvm::AArch64Subtarget	protected
RegBankInfo	llvm::AArch64Subtarget	protected
requiresStrictAlign() const	llvm::AArch64Subtarget	inline
ReserveXRegister	llvm::AArch64Subtarget	protected
Saphira enum value	llvm::AArch64Subtarget
StrictAlign	llvm::AArch64Subtarget	protected
STRQroIsSlow	llvm::AArch64Subtarget	protected
supportsAddressTopByteIgnored() const	llvm::AArch64Subtarget
TargetTriple	llvm::AArch64Subtarget	protected
ThunderX enum value	llvm::AArch64Subtarget
ThunderX2T99 enum value	llvm::AArch64Subtarget
ThunderXT81 enum value	llvm::AArch64Subtarget
ThunderXT83 enum value	llvm::AArch64Subtarget
ThunderXT88 enum value	llvm::AArch64Subtarget
TLInfo	llvm::AArch64Subtarget	protected
TSInfo	llvm::AArch64Subtarget	protected
TSV110 enum value	llvm::AArch64Subtarget
UseAA	llvm::AArch64Subtarget	protected
useAA() const override	llvm::AArch64Subtarget	inline
useAlternateSExtLoadCVTF32Pattern() const	llvm::AArch64Subtarget	inline
UseAlternateSExtLoadCVTF32Pattern	llvm::AArch64Subtarget	protected
UsePostRAScheduler	llvm::AArch64Subtarget	protected
UseRSqrt	llvm::AArch64Subtarget	protected
useRSqrt() const	llvm::AArch64Subtarget	inline
useSmallAddressing() const	llvm::AArch64Subtarget	inline
VectorInsertExtractBaseCost	llvm::AArch64Subtarget	protected
WideningBaseCost	llvm::AArch64Subtarget	protected